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Mon, 9 Mar 2026 02:27:34 -0500 Received: from [172.24.233.103] (uda0132425.dhcp.ti.com [172.24.233.103]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 6297RV9B659938; Mon, 9 Mar 2026 02:27:31 -0500 Message-ID: <89c40ed3-50a4-419e-872b-5cde8b26b8a3@ti.com> Date: Mon, 9 Mar 2026 12:57:30 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/4] arm64: dts: ti: k3-j721s2-main: Add mmio-sram node to main_navss To: Brandon Brnich , , , , , , , , References: <20260302181800.445653-1-b-brnich@ti.com> Content-Language: en-US From: Vignesh Raghavendra In-Reply-To: <20260302181800.445653-1-b-brnich@ti.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF0000020A:EE_|SJ0PR10MB4640:EE_ X-MS-Office365-Filtering-Correlation-Id: 6cf56efe-e82e-472a-9560-08de7dad558f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700016|376014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: E09Ik7qd0mAiuQi6Kz+lIYFZYrauMYMRbW+ZewahOk+99zsY8JslKDpQ16hGDFAh08UpdRgg5doUJArdsEvmZci+/iYlCzwj/WuVn5AG8bhxyLjzk3GQQ61MORboG/V/7McIyBKKQ1BERN3BdoaeXfCyWG/e2D1RKLmxASuT6RQ4MgPIXis9YDlj4n+Pb2AnbOnfqLR6RaplNpbJIfuy2P36fWJKVLJkyhBtFwzmQmvuhG6CYHQ3Whiq3HabAaTJpE1/y3hWrM98E621bdlLcbO4GiCKHKTZ03N7tp9QZzcPFzkwYzCec3MrTTpKpYk+1A+hmNAwFHf0Vk8ey9MXOx/JtVuDTA9KAtdcUYyCZNcAzytDN1rEVcsnkDW8exLNuXwqnq/J/YekP/fTrh52qD+nHWzQWqFRV+WXf5ROs72rFJzDW8mwHY1HrKMazB3X X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Mar 2026 07:27:35.0077 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6cf56efe-e82e-472a-9560-08de7dad558f X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.195];Helo=[lewvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF0000020A.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR10MB4640 On 02/03/26 23:47, Brandon Brnich wrote: > The NavigatorSS (NAVSS) address space contains a 64 KiB on-chip SRAM > region at its base address. Add an mmio-sram node to expose this region > to consumers via the generic SRAM allocator API. > > Signed-off-by: Brandon Brnich > --- > arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > index 80c51b11ac9f..7b1ba34ab719 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > @@ -785,6 +785,14 @@ main_navss: bus@30000000 { > dma-coherent; > dma-ranges; > > + main_navss_sram: navss-sram@30000000 { This fails make dtbs_check > + compatible = "mmio-sram"; > + reg = <0x00 0x30000000 0x00 0x10000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x00 0x30000000 0x10000>; > + }; > + > main_navss_intr: interrupt-controller@310e0000 { > compatible = "ti,sci-intr"; > reg = <0x00 0x310e0000 0x00 0x4000>; -- Regards Vignesh https://ti.com/opensource