From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4B05913D530 for ; Mon, 5 Aug 2024 03:27:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722828461; cv=none; b=QLULtGCQaQjtQPAOEsICz0nHVb9zKEtPA5o6Vk9xStnDOk0UtGBsVVE5+UOpi6aGyymuz5vWBBku0b7FbMV7hhNYftKQ4LOlUiVrMmzf4+A5omRWuRAgpZMtjVUTfFRBHyvHeYdDiZabPufTPI1qX3ce8qKNzJfx+x8Yh3qzclg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722828461; c=relaxed/simple; bh=hMHYsXg/nspvbDtmdihyNeNJ8UPV1Kbx4N8e0Mab0FM=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Dl5qqxOARTyd6XnGowD4n0bX2rZFLEYiKUcZJ0h8vB1gQgFHiCxOMZ5tCtrQe2DgEEz58ZsHCGQmV0kOZ5HKE8hxraKIWWM8XLByHX/eCNcVZac+XRV7S3DG+cDJ12qyXfsiEWJescaDjrqT7AHZYjhPIkl0BQd8mmnpy6u4bfY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 14829143D; Sun, 4 Aug 2024 20:28:04 -0700 (PDT) Received: from [10.162.41.10] (a077893.blr.arm.com [10.162.41.10]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3398C3F5A1; Sun, 4 Aug 2024 20:27:35 -0700 (PDT) Message-ID: <8a25787d-6684-450b-bb1c-f6b5e84fbd4e@arm.com> Date: Mon, 5 Aug 2024 08:57:32 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] arm64/tools/sysreg: Add Sysreg128/SysregFields128 To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Mark Brown , linux-kernel@vger.kernel.org References: <20240801054436.612024-1-anshuman.khandual@arm.com> <20240801054436.612024-2-anshuman.khandual@arm.com> Content-Language: en-US From: Anshuman Khandual In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 8/3/24 16:42, Mark Rutland wrote: > On Thu, Aug 01, 2024 at 11:14:36AM +0530, Anshuman Khandual wrote: >> FEAT_SYSREG128 enables 128 bit wide system registers which also need to be >> defined in (arch/arm64/toos/sysreg) for auto mask generation. This adds two >> new field types i.e Sysreg128 and SysregFields128 for that same purpose. It >> utilizes recently added macro GENMASK_U128() while also adding some helpers >> such as define_field_128() and parse_bitdef_128(). >> >> Cc: Catalin Marinas >> Cc: Will Deacon >> Cc: Mark Brown >> Cc: linux-arm-kernel@lists.infradead.org >> Cc: linux-kernel@vger.kernel.org >> Signed-off-by: Anshuman Khandual >> --- >> arch/arm64/tools/gen-sysreg.awk | 231 ++++++++++++++++++++++++++++++++ >> 1 file changed, 231 insertions(+) > Having Sysreg128 and SysregFields128 sounds reasonable, though I suspect > we can share more code with Sysreg and SysregFields (e.g. by always > using GENMASK128() even for regular SYsreg and SysregFIilds). GENMASK_U128() should deliver same bit masks that could be used instead of earlier GENMASK_ULL() bit masks. Sounds good. > > Regardless of this patch in particular, I think we want to see some > end-to-end usage (i.e. some actual bit definitions, along with asm and C > code that uses these definitions) so that we're confident this is the > right way to capture these definitions. > > Sending this piecemeal, separate to those elements and sepate to > GENMASK_U128() makes this very painful to review effectively. Please > combine those elements into a single series so that reviewers can see > the entire picture. Sure, will try and combine the elements as as much possible.