From: Yuanfang Zhang <quic_yuanfang@quicinc.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: <kernel@oss.qualcomm.com>, <linux-arm-msm@vger.kernel.org>,
<coresight@lists.linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
Subject: Re: [PATCH v8 1/2] dt-bindings: arm: Add device Trace Network On Chip definition
Date: Mon, 9 Jun 2025 14:54:30 +0800 [thread overview]
Message-ID: <8a25a320-6700-4fd0-aa08-38fe1e8c4623@quicinc.com> (raw)
In-Reply-To: <11ea6009-72d2-4306-a068-a828d4af429d@arm.com>
On 6/6/2025 5:32 PM, Suzuki K Poulose wrote:
> On 06/06/2025 10:18, Yuanfang Zhang wrote:
>> Add a new coresight-tnoc.yaml file to describe the bindings required to
>> define Trace Network On Chip (TNOC) in device trees. TNOC is an
>> integration hierarchy which is a hardware component that integrates the
>> functionalities of TPDA and funnels. It collects trace form subsystems
>> and transfers to coresight sink.
>>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
>> ---
>> .../bindings/arm/qcom,coresight-tnoc.yaml | 111 +++++++++++++++++++++
>> 1 file changed, 111 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..d07c6f2d7b949f69f9d8dd8de8664382eb39fac1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
>> @@ -0,0 +1,111 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Trace Network On Chip - TNOC
>> +
>> +maintainers:
>> + - Yuanfang Zhang <quic_yuanfang@quicinc.com>
>> +
>> +description: >
>> + The Trace Network On Chip (TNOC) is an integration hierarchy hardware
>> + component that integrates the functionalities of TPDA and funnels.
>> +
>> + It sits in the different subsystem of SOC and aggregates the trace and
>> + transports it to Aggregation TNOC or to coresight trace sink eventually.
>> + TNOC embeds bridges for all the interfaces APB, ATB, TPDA and NTS (Narrow
>> + Time Stamp).
>> +
>> + TNOC can take inputs from different trace sources i.e. ATB, TPDM.
>
> This looks like the generic description of TNOC. But please could you
> also mention this binding is only for Aggregator TNOC ? Or make the
> binding as such explicit ?
>
> - qcom,coresight-aggregator-tnoc
>
> Suzuki
>
sure, will update in next patch.
>
>> +
>> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
>> +select:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - qcom,coresight-tnoc
>> + required:
>> + - compatible
>> +
>> +properties:
>> + $nodename:
>> + pattern: "^tn(@[0-9a-f]+)$"
>> +
>> + compatible:
>> + items:
>> + - const: qcom,coresight-tnoc
>> + - const: arm,primecell
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + clock-names:
>> + items:
>> + - const: apb_pclk
>> +
>> + clocks:
>> + items:
>> + - description: APB register access clock
>> +
>> + in-ports:
>> + $ref: /schemas/graph.yaml#/properties/ports
>> +
>> + patternProperties:
>> + '^port(@[0-9a-f]{1,2})?$':
>> + description: Input connections from CoreSight Trace Bus
>> + $ref: /schemas/graph.yaml#/properties/port
>> +
>> + out-ports:
>> + $ref: /schemas/graph.yaml#/properties/ports
>> + additionalProperties: false
>> +
>> + properties:
>> + port:
>> + description:
>> + Output connection to CoreSight Trace Bus
>> + $ref: /schemas/graph.yaml#/properties/port
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - clocks
>> + - clock-names
>> + - in-ports
>> + - out-ports
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + tn@109ab000 {
>> + compatible = "qcom,coresight-tnoc", "arm,primecell";
>> + reg = <0x109ab000 0x4200>;
>> +
>> + clocks = <&aoss_qmp>;
>> + clock-names = "apb_pclk";
>> +
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + tn_ag_in_tpdm_gcc: endpoint {
>> + remote-endpoint = <&tpdm_gcc_out_tn_ag>;
>> + };
>> + };
>> + };
>> +
>> + out-ports {
>> + port {
>> + tn_ag_out_funnel_in1: endpoint {
>> + remote-endpoint = <&funnel_in1_in_tn_ag>;
>> + };
>> + };
>> + };
>> + };
>> +...
>>
>
next prev parent reply other threads:[~2025-06-09 6:54 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-06 9:18 [PATCH v8 0/2] coresight: Add Coresight Trace Network On Chip driver Yuanfang Zhang
2025-06-06 9:18 ` [PATCH v8 1/2] dt-bindings: arm: Add device Trace Network On Chip definition Yuanfang Zhang
2025-06-06 9:32 ` Suzuki K Poulose
2025-06-09 6:54 ` Yuanfang Zhang [this message]
2025-06-06 9:18 ` [PATCH v8 2/2] coresight: add coresight Trace Network On Chip driver Yuanfang Zhang
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