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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b03ab857474sm1070857866b.89.2025.09.03.08.48.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Sep 2025 08:48:42 -0700 (PDT) Message-ID: <8a963e12-1113-4604-b15f-a5867c4b5bbf@oss.qualcomm.com> Date: Wed, 3 Sep 2025 17:48:40 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 02/13] arm64: dts: qcom: lemans: Add SDHC controller and SDC pin configuration To: Wasim Nazir , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Richard Cochran Cc: kernel@oss.qualcomm.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, Monish Chunara References: <20250903-lemans-evk-bu-v2-0-bfa381bf8ba2@oss.qualcomm.com> <20250903-lemans-evk-bu-v2-2-bfa381bf8ba2@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250903-lemans-evk-bu-v2-2-bfa381bf8ba2@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODMwMDAzMiBTYWx0ZWRfX5aSWjcl9fcc0 NzI5BEimRx4X72si+1B8Z5xKh8kA/ZOjkEyKPpXFOMG15DmzwLoMs3sKOPQ62mHdBxow+l/qA8J xhK+bSnDY5ZMK1XsKR/n0G/5l8EFJLYsVP4TdTxYdcVQ1ZzaT0c8HA4GqMGT87JhIM2fSIUXLDh 9A9ujHONG5gKQg2pt8GQLOQjcXQ3Kp5Z+ZbDzsJ31TcPGeeT2NIqVcYHD7yIr1w5N4xeSgqexW/ udOARV4EGQuRf8f++sllWXnvTjR0wiRc0b1YRA3OxAJLgzkRhEh8Jis1Y50Ze4BfgnbxzYJJLTo GzPmSwdD+ZIxOcOUI6geTWPWTKoqvHK2rVJpMYCwTjFR6Qlp/ULRMm0RWMRPLDfh6ksy8J/A6X7 ZPognJIP X-Proofpoint-ORIG-GUID: B7bvM8DAzLhw0cQcmlmkAEdFNVnAnrFK X-Proofpoint-GUID: B7bvM8DAzLhw0cQcmlmkAEdFNVnAnrFK X-Authority-Analysis: v=2.4 cv=M9NNKzws c=1 sm=1 tr=0 ts=68b8635d cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=GqXf0neY-Zx-3wbHtdMA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-03_08,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 spamscore=0 priorityscore=1501 malwarescore=0 clxscore=1015 suspectscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508300032 On 9/3/25 1:47 PM, Wasim Nazir wrote: > From: Monish Chunara > > Introduce the SDHC v5 controller node for the Lemans platform. > This controller supports either eMMC or SD-card, but only one > can be active at a time. SD-card is the preferred configuration > on Lemans targets, so describe this controller. > > Define the SDC interface pins including clk, cmd, and data lines > to enable proper communication with the SDHC controller. > > Signed-off-by: Monish Chunara > Co-developed-by: Wasim Nazir > Signed-off-by: Wasim Nazir > --- > arch/arm64/boot/dts/qcom/lemans.dtsi | 91 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 91 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi > index 99a566b42ef2..9e4709dce32b 100644 > --- a/arch/arm64/boot/dts/qcom/lemans.dtsi > +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi > @@ -3834,6 +3834,57 @@ apss_tpdm2_out: endpoint { > }; > }; > > + sdhc: mmc@87c4000 { > + compatible = "qcom,sa8775p-sdhci", "qcom,sdhci-msm-v5"; > + reg = <0x0 0x087c4000 0x0 0x1000>; > + > + interrupts = , > + ; > + interrupt-names = "hc_irq", "pwr_irq"; 1 entry per line in xx-names too, please> + > + clocks = <&gcc GCC_SDCC1_AHB_CLK>, > + <&gcc GCC_SDCC1_APPS_CLK>; > + clock-names = "iface", "core"; > + > + interconnects = <&aggre1_noc MASTER_SDC 0 &mc_virt SLAVE_EBI1 0>, > + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDC1 0>; QCOM_ICC_TAG_ALWAYS for the first path, both endpoints QCOM_ICC_TAG_ACTIVE_ONLY for the second one [...] > + > + data-pins { > + pins = "sdc1_data"; > + bias-pull-up; Please put bias properties below drive-strength for consistency Konrad