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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af635accc38sm560388766b.114.2025.07.29.03.49.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 29 Jul 2025 03:49:33 -0700 (PDT) Message-ID: <8b30c83f-5f35-49d5-9c37-4002addf519a@oss.qualcomm.com> Date: Tue, 29 Jul 2025 12:49:31 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 7/7] clk: qcom: gcc: Add support for Global Clock Controller To: Dmitry Baryshkov , Taniya Das Cc: kernel@oss.qualcomm.com, Pankaj Patil , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250729-glymur-gcc-tcsrcc-rpmhcc-v3-0-227cfe5c8ef4@oss.qualcomm.com> <20250729-glymur-gcc-tcsrcc-rpmhcc-v3-7-227cfe5c8ef4@oss.qualcomm.com> <25uelsjuw4xxfopvfn4wvlj2zgivwbjprm74if5ddwvht4ibfz@yctc2kvfmxyw> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <25uelsjuw4xxfopvfn4wvlj2zgivwbjprm74if5ddwvht4ibfz@yctc2kvfmxyw> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI5MDA4MiBTYWx0ZWRfX+GlsBHEtoRIo PyLKEbtD5dsXFBP4e5C1AQlQUrR6zlkmEVDnsoAwH27LP1Ho2rbgey8KE6rxxyLua+T1LI2UwTZ 4Z5NXpjt/0xV/H2vzycNK/ZL1XZT2kWC1Th16krl7WV9R4l6pm4HcxZqJzfcY5hP99sNiVXESpU YVAZ4K62MmPMagX5uODEJtDNbF1TwiuLHB7Rv6+L4OvrqxJa1EAWRC2m7tmYA2w3HBXe07JOgBT +YxpTktp8PXkD3QdzYdnIad96o6yZZnJEdiL0EvQBo2LhPPd7PT0H2Ap+rz2+93C/61XafdA5sr 5ZVue6vVlQkeQ8oDAVS7T6M1cKb4ISREUGtuANRhFkImZFUR+m7LG5VmfR3mBdedlA4Erl37QPu tHtTi5hByNdOpudEvFOd7Lp/hBNWoY+33Z+YE9lGZq64boUpAkvhYklbGYroTLMepneQxmAB X-Authority-Analysis: v=2.4 cv=JKw7s9Kb c=1 sm=1 tr=0 ts=6888a740 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=N_I0jeO3kqKEb7emQd8A:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-ORIG-GUID: FdAJrMGx5LNV_J80CPWOXPlnRp__wgfT X-Proofpoint-GUID: FdAJrMGx5LNV_J80CPWOXPlnRp__wgfT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-29_02,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 priorityscore=1501 spamscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 clxscore=1015 mlxlogscore=999 adultscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507290082 On 7/29/25 12:48 PM, Dmitry Baryshkov wrote: > On Tue, Jul 29, 2025 at 11:12:41AM +0530, Taniya Das wrote: >> Add support for Global clock controller for Glymur platform. >> >> Signed-off-by: Taniya Das >> --- >> drivers/clk/qcom/Kconfig | 9 + >> drivers/clk/qcom/Makefile | 1 + >> drivers/clk/qcom/gcc-glymur.c | 8623 +++++++++++++++++++++++++++++++++++++++++ >> 3 files changed, 8633 insertions(+) >> >> +static void clk_glymur_regs_configure(struct device *dev, struct regmap *regmap) >> +{ >> + int ret; >> + >> + ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, >> + ARRAY_SIZE(gcc_dfs_clocks)); > > Why are you doing this manually instead of using > qcom_cc_driver_data.dfs_rcgs ? I guess that has been merged last week or so, so yeah, please rebase Konrad