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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac3ef8e5128sm1034146766b.59.2025.03.26.06.47.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Mar 2025 06:47:53 -0700 (PDT) Message-ID: <8b7151d6-e2e0-4561-954d-4a74126b4265@oss.qualcomm.com> Date: Wed, 26 Mar 2025 14:47:50 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/10] arm64: dts: qcom: sm8750: Add USB support to SM8750 SoCs To: Melody Olvera , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Greg Kroah-Hartman , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20250324-sm8750_usb_master-v3-0-13e096dc88fd@quicinc.com> <20250324-sm8750_usb_master-v3-7-13e096dc88fd@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250324-sm8750_usb_master-v3-7-13e096dc88fd@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: l1SNlxbEppC6Objr4kjJiq6pUrt5qyDi X-Authority-Analysis: v=2.4 cv=UblRSLSN c=1 sm=1 tr=0 ts=67e4058b cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=x9b32qiywL4GtknhJMwA:9 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: l1SNlxbEppC6Objr4kjJiq6pUrt5qyDi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-26_06,2025-03-26_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 phishscore=0 mlxscore=0 impostorscore=0 adultscore=0 clxscore=1015 mlxlogscore=801 bulkscore=0 malwarescore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503260083 On 3/24/25 9:18 PM, Melody Olvera wrote: > From: Wesley Cheng > > Add the base USB devicetree definitions for SM8750 platforms. The overall > chipset contains a single DWC3 USB3 controller (rev. 200a), SS QMP PHY > (rev. v8) and M31 eUSB2 PHY. The major difference for SM8750 is the > transition to using the M31 eUSB2 PHY compared to previous SoCs. > > Enable USB support on SM8750 MTP and QRD variants. SM8750 has a QMP combo > PHY for the SSUSB path, and a M31 eUSB2 PHY for the HSUSB path. > > Signed-off-by: Wesley Cheng > Signed-off-by: Melody Olvera > --- [...] > + usb_1: usb@a6f8800 { > + compatible = "qcom,sm8750-dwc3", "qcom,dwc3"; > + reg = <0x0 0x0a6f8800 0x0 0x400>; > + > + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, > + <&gcc GCC_USB30_PRIM_MASTER_CLK>, > + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, > + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, > + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, > + <&tcsrcc TCSR_USB3_CLKREF_EN>; I believe this belongs to the PHY, but the documentation doesn't make that very clear.. With that squared out whichever way is correct: Reviewed-by: Konrad Dybcio Konrad