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Mon, 03 Mar 2025 21:23:53 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 523LNqnR001016 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 3 Mar 2025 21:23:52 GMT Received: from [10.110.69.79] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 3 Mar 2025 13:23:51 -0800 Message-ID: <8c0c0935-3a20-4c6a-a6fb-556e14ecedda@quicinc.com> Date: Mon, 3 Mar 2025 13:23:11 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 05/16] dt-bindings: display/msm: dp-controller: Add SM8750 To: Dmitry Baryshkov CC: Krzysztof Kozlowski , Rob Clark , Sean Paul , Marijn Suijten , David Airlie , "Simona Vetter" , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Manikandan , Jonathan Marek , Kuogee Hsieh , Neil Armstrong , , , , , , "Srini Kandagatla" References: <20250217-b4-sm8750-display-v2-0-d201dcdda6a4@linaro.org> <20250217-b4-sm8750-display-v2-5-d201dcdda6a4@linaro.org> <2dfe466c-ad94-4683-a2e9-a49e77a61f4f@linaro.org> <4e82404a-0ea5-4641-829a-bba666edd352@quicinc.com> Content-Language: en-US From: Abhinav Kumar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: U0A0gXsukuszRPuGJAxn_2wPnvZt7M3G X-Proofpoint-GUID: U0A0gXsukuszRPuGJAxn_2wPnvZt7M3G X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-03_10,2025-03-03_04,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 phishscore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 lowpriorityscore=0 spamscore=0 malwarescore=0 suspectscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2503030165 On 2/24/2025 7:14 PM, Dmitry Baryshkov wrote: > On Mon, 24 Feb 2025 at 20:59, Abhinav Kumar wrote: >> >> >> >> On 2/19/2025 9:08 AM, Dmitry Baryshkov wrote: >>> On Wed, Feb 19, 2025 at 06:02:20PM +0100, Krzysztof Kozlowski wrote: >>>> On 17/02/2025 19:58, Dmitry Baryshkov wrote: >>>>> On Mon, Feb 17, 2025 at 05:41:26PM +0100, Krzysztof Kozlowski wrote: >>>>>> Add DisplayPort controller for Qualcomm SM8750 SoC which so far looks >>>>>> fully compatible with earlier SM8650 variant. >>>>> >>>>> As that became a question for QCS8300, does SM8750 also support exactly >>>>> two MST streams? >>>> >>>> v1.5 of DP (starting from SA8775p , then SM8650 and SM8750) support 4x >>>> MST for DPTX0 and 2x MST for DPTX1. >>>> >>>> The DP in SM8650 and SM8750 are identical, according to datasheet (v1.5.1). >>> >>> Hmm. This also means that QCS8300 is compatible with SM8650. I'll let >>> Abhinav comment here. >>> >> >> DP version by itself is not a good measure of whether the controller can >> support 4 streams or not. >> >> Firstly, sm8650/sm8750 do not have a DPTX1 so we are only discussing >> about DP TX0. >> >> Coming to the QCS8300 Vs sm8650/sm8750, even though the DP controller >> version is the same, there is no HW support for more than 2 streams on >> sm8650/sm8750 because there are no INTF blocks to drive 4 streams. >> >> On sm8650/sm8750, only INTF_0 and INTF_3 can be used for DP. Hence 2 >> streams. >> >> Whereas on Monaco, we have INTF_0, INTF_3, INTF_6 and INTF_7 capable of > > No idea what Monaco is, most likely it is some platform. Please use > SoC names in public. > Monaco is indeed QCS8300. I usually do use SoC names, in this instance just intuitively ended up using the internal one as I use it often. >> driving DP. Hence 4 streams. >> >> Let me know if there are more questions. > > How many stream clocks are present on those platforms? I'm asking > because there is a small, but not non-existing difference between 'DPs > are not completely compatible / the same' and 'DPs are fully > compatible but different DPU blocks impose different restrictions on > the number of MST streams'. > I have confirmed this internally. sm8650/sm8750 have only 2 stream clocks and not 4.