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AJvYcCU5oRi7+pd5Jxob6Bn/mqposl7KEIH0LAxCh31q9Q9nQibjU//dj8/xHzexAFaW6iVKn8kVPRBhfk9bMts=@vger.kernel.org X-Gm-Message-State: AOJu0YwrL9vI9LghM726MTpaOc9nrXmdDw/nGQTpYD6nOBwNjO6L3c/i qC7AOdsBTQx/PwGN+8xBd78ljEOxVzeVnmYx6Fe+NWNRmKmJFZkp4zVDCxFAyow= X-Gm-Gg: ASbGncuusotQ0HaFLQF2SvN2pZJjQgm0c2L7VjpUuQS736Cn9MfJemxEf4jS4Q+uU93 As9WznJkd4cW8hCIVmNmQwKzrXJFrnndM69cGgI3eGjDthJI9vQuhM5R84UpeWUq1+AgVFLPAg1 UKd7UWQn5h1kvOl0y2o1jHtyS1yzDI4BE/W8Bz2dVKZgcJLU4m5O0F2d4vJb5jBfObTqtGGRYgn bWLl7ucOft2/0ucsUSS87rDxr+8y3mHLl+qUzpMqlw/4CoBMQGaFQ== X-Google-Smtp-Source: AGHT+IG8d+GIp7N1rLmweG1s9QVjHKMOxpL6iKDNzEJzmEVoVKRVhmtWfMeaWkWFRVe64V9BiKR57g== X-Received: by 2002:a05:600c:4ecf:b0:426:647b:1bfc with SMTP id 5b1f17b1804b1-434d0a14eb7mr70707555e9.30.1733326967904; Wed, 04 Dec 2024 07:42:47 -0800 (PST) Received: from draszik.lan ([80.111.64.44]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d526b131sm29295485e9.7.2024.12.04.07.42.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Dec 2024 07:42:47 -0800 (PST) Message-ID: <8c1c633bbd5a81a06ee9c9f52dfa8b43cf493b7b.camel@linaro.org> Subject: Re: [PATCH 8/9] phy: exynos5-usbdrd: subscribe to orientation notifier if required From: =?ISO-8859-1?Q?Andr=E9?= Draszik To: Vinod Koul Cc: Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marek Szyprowski , Sylwester Nawrocki , Alim Akhtar , Peter Griffin , Tudor Ambarus , Sam Protsenko , Will McVicker , Roy Luo , kernel-team@android.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Date: Wed, 04 Dec 2024 15:42:46 +0000 In-Reply-To: References: <20241127-gs101-phy-lanes-orientation-phy-v1-0-1b7fce24960b@linaro.org> <20241127-gs101-phy-lanes-orientation-phy-v1-8-1b7fce24960b@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.1-4 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Vinod, Thanks for your review. On Wed, 2024-12-04 at 19:40 +0530, Vinod Koul wrote: > On 27-11-24, 10:58, Andr=C3=A9 Draszik wrote: > > gs101's SS phy needs to be configured differently based on the > > connector orientation, as the SS link can only be established if the > > mux is configured correctly. > >=20 > > The code to handle programming of the mux is in place already, this com= mit > > now adds the missing pieces to subscribe to the Type-C orientation > > switch event. > >=20 > > Note that for this all to work we rely on the USB controller > > re-initialising us. It should invoke our .exit() upon cable unplug, and > > during cable plug we'll receive the orientation event after which we > > expect our .init() to be called. > >=20 > > Above reinitialisation happens if the DWC3 controller can enter runtime > > suspend automatically. For the DWC3 driver, this is an opt-in: > > =C2=A0=C2=A0=C2=A0 echo auto > /sys/devices/.../11110000.usb/power/cont= rol > > Once done, things work as long as the UDC is not bound as otherwise it > > stays busy because it doesn't cancel / stop outstanding TRBs. For now > > we have to manually unbind the UDC in that case: > > =C2=A0=C2=A0=C2=A0=C2=A0 echo "" > sys/kernel/config/usb_gadget/.../UDC > >=20 > > Signed-off-by: Andr=C3=A9 Draszik > > --- > > =C2=A0drivers/phy/samsung/Kconfig=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 1 + > > =C2=A0drivers/phy/samsung/phy-exynos5-usbdrd.c | 60 +++++++++++++++++++= +++++++++++++ > > =C2=A02 files changed, 61 insertions(+) > >=20 > > diff --git a/drivers/phy/samsung/Kconfig b/drivers/phy/samsung/Kconfig > > index f10afa3d7ff5..fc7bd1088576 100644 > > --- a/drivers/phy/samsung/Kconfig > > +++ b/drivers/phy/samsung/Kconfig > > @@ -80,6 +80,7 @@ config PHY_EXYNOS5_USBDRD > > =C2=A0 tristate "Exynos5 SoC series USB DRD PHY driver" > > =C2=A0 depends on (ARCH_EXYNOS && OF) || COMPILE_TEST > > =C2=A0 depends on HAS_IOMEM > > + depends on TYPEC || (TYPEC=3Dn && COMPILE_TEST) > > =C2=A0 depends on USB_DWC3_EXYNOS > > =C2=A0 select GENERIC_PHY > > =C2=A0 select MFD_SYSCON > > diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/sam= sung/phy-exynos5-usbdrd.c > > index 1a34e9b4618a..2010d25ee817 100644 > > --- a/drivers/phy/samsung/phy-exynos5-usbdrd.c > > +++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c > > @@ -394,6 +394,7 @@ struct exynos5_usbdrd_phy_drvdata { > > =C2=A0 * @extrefclk: frequency select settings when using 'separate > > =C2=A0 * =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 reference clocks' for SS = and HS operations > > =C2=A0 * @regulators: regulators for phy > > + * @sw: TypeC orientation switch handle > > =C2=A0 * @orientation: TypeC connector orientation - normal or flipped > > =C2=A0 */ > > =C2=A0struct exynos5_usbdrd_phy { > > @@ -415,6 +416,7 @@ struct exynos5_usbdrd_phy { > > =C2=A0 u32 extrefclk; > > =C2=A0 struct regulator_bulk_data *regulators; > > =C2=A0 > > + struct typec_switch_dev *sw; > > =C2=A0 enum typec_orientation orientation; > > =C2=A0}; > > =C2=A0 > > @@ -1400,6 +1402,60 @@ static int exynos5_usbdrd_phy_clk_handle(struct = exynos5_usbdrd_phy *phy_drd) > > =C2=A0 return 0; > > =C2=A0} > > =C2=A0 > > +#if IS_ENABLED(CONFIG_TYPEC) > > +static int exynos5_usbdrd_orien_sw_set(struct typec_switch_dev *sw, > > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 enum typec_orientation orient= ation) > > +{ > > + struct exynos5_usbdrd_phy *phy_drd =3D typec_switch_get_drvdata(sw); > > + > > + scoped_guard(mutex, &phy_drd->phy_mutex) > > + phy_drd->orientation =3D orientation; > > + > > + return 0; > > +} > > + > > +static void exynos5_usbdrd_orien_switch_unregister(void *data) > > +{ > > + struct exynos5_usbdrd_phy *phy_drd =3D data; > > + > > + typec_switch_unregister(phy_drd->sw); > > +} > > + > > +static int exynos5_usbdrd_setup_notifiers(struct exynos5_usbdrd_phy *p= hy_drd) > > +{ > > + int ret; > > + > > + phy_drd->orientation =3D (enum typec_orientation)-1; >=20 > Should this be TYPEC_ORIENTATION_NONE? It's -1 so that exynos5_usbdrd_orien_sw_set() (patch 9) can check against the current value after driver load. That said, it should probably be moved into patch 9 where it actually matters, or even be removed altogether, in combination with that check in exynos5_usbdrd_orien_sw_set() from patch 9. I had added the check because some (not all) other phy drivers do that, but looking further at that, I believe it's not actually necessary, exynos5_usbdrd_orien_sw_set() can execute unconditionally. Will remove this and related code in next version. Cheers, Andre'