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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa67f26cff7sm672205966b.57.2024.12.12.10.19.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Dec 2024 10:19:50 -0800 (PST) Message-ID: <8c60e0dc-531a-47d6-9c40-ea157a24da1b@oss.qualcomm.com> Date: Thu, 12 Dec 2024 19:19:47 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 3/5] dt-bindings: arm: Add Coresight TMC Control Unit hardware To: Jie Gan , Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Jinlong Mao , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Tingwei Zhang , linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com References: <20241210031545.3468561-1-quic_jiegan@quicinc.com> <20241210031545.3468561-4-quic_jiegan@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241210031545.3468561-4-quic_jiegan@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: p8yJF8pRsXZDXgZGyMx6a_2oKbt8mxJF X-Proofpoint-GUID: p8yJF8pRsXZDXgZGyMx6a_2oKbt8mxJF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 phishscore=0 mlxlogscore=999 lowpriorityscore=0 mlxscore=0 adultscore=0 spamscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412120132 On 10.12.2024 4:15 AM, Jie Gan wrote: > Add binding file to specify how to define a Coresight TMC > Control Unit device in device tree. > > It is responsible for controlling the data filter function > based on the source device's Trace ID for TMC ETR device. > The trace data with that Trace id can get into ETR's buffer > while other trace data gets ignored. > > Reviewed-by: Rob Herring (Arm) > Signed-off-by: Jie Gan > --- [...] > + > +properties: > + compatible: > + enum: > + - qcom,sa8775p-ctcu I don't think anyone asked that question.. Is the TMCCU something unique to Qualcomm platforms? Konrad