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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a2d1926d0csm29852265ad.71.2025.12.18.08.18.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Dec 2025 08:18:38 -0800 (PST) Message-ID: <8cb8fad9-c54e-43a3-a769-5452119cc2a1@oss.qualcomm.com> Date: Fri, 19 Dec 2025 00:18:31 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 00/12] coresight: Add CPU cluster funnel/replicator/tmc support To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , Leo Yan , Alexander Shishkin , Bjorn Andersson , Konrad Dybcio , Sudeep Holla Cc: kernel@oss.qualcomm.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, maulik.shah@oss.qualcomm.com, Jie Gan References: <20251218-cpu_cluster_component_pm-v2-0-2335a6ae62a0@oss.qualcomm.com> <47191600-260a-46aa-9af8-dff2b08dc2e8@arm.com> Content-Language: en-US From: yuanfang zhang In-Reply-To: <47191600-260a-46aa-9af8-dff2b08dc2e8@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE4MDEzNSBTYWx0ZWRfX76lF0z8aDy7i IBikI3cAhDwwT+L+PP+95R7ww8HjhWgT+YBicunvfgDk+m9PcuX12CB8WA0xl26VlhUZR1jvaQV Zd4EE4sA8inbYJIdLf7PnjoXC5QwWKD9zEkeZF85DT0IT5YYISHJFLbdgYXKUVRf9fmurKLm758 65qdpHxxqKrgfcQtFzTkEpOj/7LGwb8eEVd2R7gi6wy8U9ZD8gi7w5hVFzA9Tk4JTUtlbXg6Ylx 659gO/0iwXVrDqyLMFpSq8RSrHHICQl5YZwvSJrSfAzsMtu9gquprPIqgE1V8mN6NWnuTEfRUGE Gb6AkdlALdv6s6ZdPfCGxICZlG0YqDyHcJUnaOEcZnkTlqwAv9y+9ZfTkYns4TXBhsqWqvypv/E 2dOJVtQedOSNkmFVJZjY8cOCzRi+Og== X-Authority-Analysis: v=2.4 cv=M9tA6iws c=1 sm=1 tr=0 ts=69442961 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=CQXatAnIE5CuAcsigYkA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-GUID: rXADX25v80IfKgssF4deYtXdHABxVYNa X-Proofpoint-ORIG-GUID: rXADX25v80IfKgssF4deYtXdHABxVYNa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-18_02,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 clxscore=1015 suspectscore=0 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512180135 On 12/18/2025 5:32 PM, Suzuki K Poulose wrote: > Cc: Sudeep > > On 18/12/2025 08:09, Yuanfang Zhang wrote: >> This patch series adds support for CoreSight components local to CPU clusters, >> including funnel, replicator, and TMC, which reside within CPU cluster power >> domains. These components require special handling due to power domain >> constraints. >> >> Unlike system-level CoreSight devices, these components share the CPU cluster's >> power domain. When the cluster enters low-power mode (LPM), their registers >> become inaccessible. Notably, `pm_runtime_get` alone cannot bring the cluster >> out of LPM, making standard register access unreliable. > > Why ? AFAIU, we have ways to tie the power-domain to that of the cluster > and that can auto-magically keep the cluster power ON as long as you > want to use them. > > Suzuki > Hi Suzuki Runtime PM for CPU devices works little different, it is mostly used to manage hierarchical CPU topology (PSCI OSI mode) to talk with genpd framework to manage the last CPU handling in cluster. It doesn’t really send IPI to wakeup CPU device (It don’t have .power_on/.power_off) callback implemented which gets invoked from .runtime_resume callback. This behavior is aligned with the upstream Kernel. Yuanfang > >> >> To address this, the series introduces: >> - Identifying cluster-bound devices via a new `qcom,cpu-bound-components` >>    device tree property. >> - Implementing deferred probing: if associated CPUs are offline during >>    probe, initialization is deferred until a CPU hotplug notifier detects >>    the CPU coming online. >> - Utilizing `smp_call_function_single()` to ensure register accesses >>    (initialization, enablement, sysfs reads) are always executed on a >>    powered CPU within the target cluster. >> - Extending the CoreSight link `enable` callback to pass the `cs_mode`. >>    This allows drivers to distinguish between SysFS and Perf modes and >>    apply mode-specific logic. >> >> Jie Gan (1): >>    arm64: dts: qcom: hamoa: add Coresight nodes for APSS debug block >> >> Yuanfang Zhang (11): >>    dt-bindings: arm: coresight: Add 'qcom,cpu-bound-components' property >>    coresight: Pass trace mode to link enable callback >>    coresight-funnel: Support CPU cluster funnel initialization >>    coresight-funnel: Defer probe when associated CPUs are offline >>    coresight-replicator: Support CPU cluster replicator initialization >>    coresight-replicator: Defer probe when associated CPUs are offline >>    coresight-replicator: Update management interface for CPU-bound devices >>    coresight-tmc: Support probe and initialization for CPU cluster TMCs >>    coresight-tmc-etf: Refactor enable function for CPU cluster ETF support >>    coresight-tmc: Update management interface for CPU-bound TMCs >>    coresight-tmc: Defer probe when associated CPUs are offline >> >> Verification: >> >> This series has been verified on sm8750. >> >> Test steps for delay probe: >> >> 1. limit the system to enable at most 6 CPU cores during boot. >> 2. echo 1 >/sys/bus/cpu/devices/cpu6/online. >> 3. check whether ETM6 and ETM7 have been probed. >> >> Test steps for sysfs mode: >> >> echo 1 >/sys/bus/coresight/devices/tmc_etf0/enable_sink >> echo 1 >/sys/bus/coresight/devices/etm0/enable_source >> echo 1 >/sys/bus/coresight/devices/etm6/enable_source >> echo 0 >/sys/bus/coresight/devices/etm0/enable_source >> echo 0 >/sys/bus/coresight/devicse/etm6/enable_source >> echo 0 >/sys/bus/coresight/devices/tmc_etf0/enable_sink >> >> echo 1 >/sys/bus/coresight/devices/tmc_etf1/enable_sink >> echo 1 >/sys/bus/coresight/devcies/etm0/enable_source >> cat /dev/tmc_etf1 >/tmp/etf1.bin >> echo 0 >/sys/bus/coresight/devices/etm0/enable_source >> echo 0 >/sys/bus/coresight/devices/tmc_etf1/enable_sink >> >> echo 1 >/sys/bus/coresight/devices/tmc_etf2/enable_sink >> echo 1 >/sys/bus/coresight/devices/etm6/enable_source >> cat /dev/tmc_etf2 >/tmp/etf2.bin >> echo 0 >/sys/bus/coresight/devices/etm6/enable_source >> echo 0 >/sys/bus/coresight/devices/tmc_etf2/enable_sink >> >> Test steps for sysfs node: >> >> cat /sys/bus/coresight/devices/tmc_etf*/mgmt/* >> >> cat /sys/bus/coresight/devices/funnel*/funnel_ctrl >> >> cat /sys/bus/coresight/devices/replicator*/mgmt/* >> >> Test steps for perf mode: >> >> perf record -a -e cs_etm//k -- sleep 5 >> >> Signed-off-by: Yuanfang Zhang >> --- >> Changes in v2: >> - Use the qcom,cpu-bound-components device tree property to identify devices >>    bound to a cluster. >> - Refactor commit message. >> - Introduce a supported_cpus field in the drvdata structure to record the CPUs >>    that belong to the cluster where the local component resides. >> - Link to v1: https://lore.kernel.org/r/20251027-cpu_cluster_component_pm-v1-0-31355ac588c2@oss.qualcomm.com >> >> --- >> Jie Gan (1): >>        arm64: dts: qcom: hamoa: Add CoreSight nodes for APSS debug block >> >> Yuanfang Zhang (11): >>        dt-bindings: arm: coresight: Add 'qcom,cpu-bound-components' property >>        coresight-funnel: Support CPU cluster funnel initialization >>        coresight-funnel: Defer probe when associated CPUs are offline >>        coresight-replicator: Support CPU cluster replicator initialization >>        coresight-replicator: Defer probe when associated CPUs are offline >>        coresight-replicator: Update management interface for CPU-bound devices >>        coresight-tmc: Support probe and initialization for CPU cluster TMCs >>        coresight-tmc-etf: Refactor enable function for CPU cluster ETF support >>        coresight-tmc: Update management interface for CPU-bound TMCs >>        coresight-tmc: Defer probe when associated CPUs are offline >>        coresight: Pass trace mode to link enable callback >> >>   .../bindings/arm/arm,coresight-dynamic-funnel.yaml |   5 + >>   .../arm/arm,coresight-dynamic-replicator.yaml      |   5 + >>   .../devicetree/bindings/arm/arm,coresight-tmc.yaml |   5 + >>   arch/arm64/boot/dts/qcom/hamoa.dtsi                | 926 +++++++++++++++++++++ >>   arch/arm64/boot/dts/qcom/purwa.dtsi                |  12 + >>   drivers/hwtracing/coresight/coresight-core.c       |   7 +- >>   drivers/hwtracing/coresight/coresight-funnel.c     | 258 +++++- >>   drivers/hwtracing/coresight/coresight-replicator.c | 341 +++++++- >>   drivers/hwtracing/coresight/coresight-tmc-core.c   | 387 +++++++-- >>   drivers/hwtracing/coresight/coresight-tmc-etf.c    | 106 ++- >>   drivers/hwtracing/coresight/coresight-tmc.h        |  10 + >>   drivers/hwtracing/coresight/coresight-tnoc.c       |   3 +- >>   drivers/hwtracing/coresight/coresight-tpda.c       |   3 +- >>   include/linux/coresight.h                          |   3 +- >>   14 files changed, 1902 insertions(+), 169 deletions(-) >> --- >> base-commit: 008d3547aae5bc86fac3eda317489169c3fda112 >> change-id: 20251016-cpu_cluster_component_pm-ce518f510433 >> >> Best regards, >