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([2600:8802:b00:4a48:4964:df1f:902d:8530]) by smtp.gmail.com with ESMTPSA id g17sm7885482pfv.136.2021.12.11.20.04.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 11 Dec 2021 20:04:44 -0800 (PST) Message-ID: <8ceaa6c1-9840-17b4-73f8-1a7f665e430f@gmail.com> Date: Sat, 11 Dec 2021 20:04:42 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.3.2 Subject: Re: [net-next RFC PATCH v4 15/15] net: dsa: qca8k: cache lo and hi for mdio write Content-Language: en-US To: Ansuel Smith , Andrew Lunn , Vivien Didelot , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org References: <20211211195758.28962-1-ansuelsmth@gmail.com> <20211211195758.28962-16-ansuelsmth@gmail.com> From: Florian Fainelli In-Reply-To: <20211211195758.28962-16-ansuelsmth@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/11/2021 11:57 AM, Ansuel Smith wrote: > From Documentation, we can cache lo and hi the same way we do with the > page. This massively reduce the mdio write as 3/4 of the time we only > require to write the lo or hi part for a mdio write. > > Signed-off-by: Ansuel Smith > --- > drivers/net/dsa/qca8k.c | 49 ++++++++++++++++++++++++++++++++++++----- > 1 file changed, 44 insertions(+), 5 deletions(-) > > diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c > index 375a1d34e46f..b109a74031c6 100644 > --- a/drivers/net/dsa/qca8k.c > +++ b/drivers/net/dsa/qca8k.c > @@ -94,6 +94,48 @@ qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) > *page = regaddr & 0x3ff; > } > > +static u16 qca8k_current_lo = 0xffff; Let's assume I have two qca8k switches in my system on the same or a different MDIO bus, is not the caching supposed to be a per-qca8k switch instance thing? > + > +static int > +qca8k_set_lo(struct mii_bus *bus, int phy_id, u32 regnum, u16 lo) > +{ > + int ret; > + > + if (lo == qca8k_current_lo) { > + // pr_info("SAME LOW"); Stray debugging left. > + return 0; > + } > + > + ret = bus->write(bus, phy_id, regnum, lo); > + if (ret < 0) > + dev_err_ratelimited(&bus->dev, > + "failed to write qca8k 32bit lo register\n"); > + > + qca8k_current_lo = lo; > + return 0; > +} > + > +static u16 qca8k_current_hi = 0xffff; > + > +static int > +qca8k_set_hi(struct mii_bus *bus, int phy_id, u32 regnum, u16 hi) > +{ > + int ret; > + > + if (hi == qca8k_current_hi) { > + // pr_info("SAME HI"); Likewise -- Florian