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Wed, 21 Oct 2026 02:44:40 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c4678f7cc2csm59794166b.24.2026.10.21.02.44.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Oct 2026 02:44:39 -0700 (PDT) Message-ID: <8ceba969-91d2-4b43-81d0-b26e7139664b@oss.qualcomm.com> Date: Wed, 21 Oct 2026 11:44:31 +0200 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] dt-bindings: usb: snps,dwc3: Fix downstream port numbering To: Chen-Yu Tsai , Neil Armstrong Cc: Greg Kroah-Hartman , Felipe Balbi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Sven Peter , Janne Grunau , Neal Gompa , Joel Stanley , Andrew Jeffery , Ryan Chen , Billy Tsai , Michal Simek , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Peter Griffin , =?UTF-8?Q?Andr=C3=A9_Draszik?= , Tudor Ambarus , Heiko Stuebner , Alim Akhtar , Kunihiko Hayashi , Masami Hiramatsu , Yixun Lan , Troy Mitchell , Minda Chen , Shyam Pandey , Wei Yang , Senchuan Zhang , Hang Cao , Li Jun , Peng Fan , Roy Luo , Yang Xiwen , Ahmad Zainie , Robert Marko , Xu Yang , Wesley Cheng , Stanley Chang , Ze Huang , Aswath Govindraju , Roger Quadros , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-aspeed@lists.ozlabs.org, imx@lists.linux.dev, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, Mathias Nyman References: <20261014082037.1774672-1-wenst@chromium.org> <20261014082037.1774672-3-wenst@chromium.org> <7020a7a6-332e-4fd0-a659-d82eb768614c@linaro.org> <03375a31-0ac6-47a4-b0dc-6327080e1622@linaro.org> <8d4d3ec2-3c97-4a46-97f8-048fdf81b853@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; 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A quick search says that it can tunnel > USB 3.x, DP, and PCIe, and it doesn't have its own USB HCI defined. > > So I'm thinking the USB4 controller would be more like a nexus node > or multiplexing node, or perhaps like a USB C connector. It has input > ports for all the protocols it can tunnel, connected to their respective > controllers (XHCI, DP, PCIe). The binding probably would be very messy > if one controller supported multiple outgoing ports, as each downstream > port has a 3-to-1 relationship with its respective upstream protocol > interfaces. Yeah that is more or less it. There needs to be a connection between the USB4 router and the native (USB3 *port*, not hub | PCIe *port*, not RC | DPTX) protocol adapter where the tunneled packets end up at to create a PM devlink between it and the USB4 router. ACPI does that by adding a `usb4-host-interface = &reference_to_router` property, for DT that's still undecided: https://github.com/devicetree-org/dt-schema/pull/196 As far as the Qualcomm implementation goes, I was hoping we could go forward with base1 numbering as the DWC3 is an XHCI controller: https://lore.kernel.org/linux-usb/20260929-topic-dwc3_tunneling_state-v4-0-63e296346d57@oss.qualcomm.com/ Konrad