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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-38e4aff1545sm151892a91.5.2026.07.16.17.59.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Jul 2026 17:59:09 -0700 (PDT) Message-ID: <8d757505-ea93-4dd4-a374-79f143f6f949@gmail.com> Date: Fri, 17 Jul 2026 08:59:05 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] dt-bindings: iio: adc: Add Nuvoton MA35D1 EADC To: Jonathan Cameron Cc: jic23@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, linux-arm-kernel@lists.infradead.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cwweng@nuvoton.com References: <20260713081127.115197-1-cwweng.linux@gmail.com> <20260713081127.115197-2-cwweng.linux@gmail.com> <20260716174237.00004b79@oss.qualcomm.com> Content-Language: en-US From: Chi-Wen Weng In-Reply-To: <20260716174237.00004b79@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Jonathan, Thank you for the review. > Not sure this doc helps. What are these interrupts for? > The driver only uses one of them so why are there 4? > > May well need interrupt-names to allow gaps in the list to > work but hard to tell without more information. The hardware has four EADC interrupt outputs, ADINT0 to ADINT3. The conversion-complete source for each interrupt can be selected through the EADC interrupt source registers. However, this initial driver only uses sample module 0 and routes its end-of-conversion event to ADINT0. So the binding does not need to describe the unused interrupt outputs at this stage. I will simplify this in v3 and document only one interrupt entry for ADINT0. If support for the other ADINT lines is added later, the binding can be extended with interrupt-names at that point. I will also drop the redundant maxItems from the interrupts property, as reported by Rob's bot. > Do you need that explicitly. I think adc.yaml already brings that in. No, it is not needed. I will drop the explicit diff-channels property from the binding. > For these take a look at the description of diff-channels. > It states that where the pairs are hard wired you can just use reg > and not specify diff-channels.  Seems to apply here and will greatly > simplify this binding. Yes, the differential pairs are fixed in hardware. The valid pairs are 0-4, 1-5, 2-6 and 3-7. I will rework the channel binding to avoid diff-channels for these fixed pairs. For fixed differential channels, reg will identify the hardware pair. For single-ended inputs, I will use single-channel so that the single-ended input number is explicit and not confused with a fixed differential pair index. That should remove the large allOf block and make the binding much simpler. > What are these channels?  There is a reference to one > internally wired one so what are the other 3? Channels 4 to 7 are external ADC input pins. They can be used as single-ended inputs, and in differential mode they are the fixed negative inputs for channels 0 to 3. The internally wired channel is channel 8, which is the VBAT input. This binding only describes the external ADC input pins, so I will clarify the description to avoid confusion. Thanks again. I will address these issues in the next revision. Best regards, Chi-Wen