Re: [PATCH net] net: dsa: mv88e6xxx: Reset mv88e6393x watchdog register

[Gustav Ekelund <gustaek@axis.com>]

On 3/28/23 16:47, Marek Behún wrote:
> On Tue, Mar 28, 2023 at 03:45:51PM +0200, Andrew Lunn wrote:
>> On Tue, Mar 28, 2023 at 03:34:03PM +0200, Gustav Ekelund wrote:
>>
>>> 1) Marvell has confirmed that 6393x (Amethyst) differs from 6390 (Peridot)
>>> with quote: “I tried this on my board and see G2 offset 0x1B index 12 bit 0
>>> does not clear, I also tried doing a SWReset and the bit is still 1. I did
>>> try the same on a Peridot board and it clears as advertised.”
>>>
>>> 2) Marvell are not aware of any other stuck bits, but has confirmed that the
>>> WD event bits are not cleared on SW reset which is indeed contradictory to
>>> what the data sheet suggests.
>>
>> Hi Gustav
>>
>> Please expand the commit message with a summary of this
>> information. It answers the questions both Marek and i have been
>> asking, so deserves to be in the commit message.
>>
>> 	Andrew
> 
> Maybe also add a comment next to the code writing to the register, that
> this is due to an yet unreleased erratum on 6393x.
> 
> Marek
Hi Marek and Andrew

As you pointed out, it is only the force WD bit that is writeable and
the others are read-only. Just needed to clarify that the patch is only
meant to solve clearing the force WD event bit (bit 0).
I will clarify this in the commit as well.

The errata is allegedly planned to be documented in their next version
of release notes.

Thank you for reviewing!

Best regards
Gustav