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Tue, 17 Mar 2026 22:24:13 -0700 (PDT) X-Received: by 2002:a05:6a21:a90:b0:39b:8545:f15 with SMTP id adf61e73a8af0-39b99de82c7mr1830644637.25.1773811452784; Tue, 17 Mar 2026 22:24:12 -0700 (PDT) Received: from [10.0.0.3] ([106.222.229.118]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c741e0b31fasm1255083a12.5.2026.03.17.22.24.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 17 Mar 2026 22:24:12 -0700 (PDT) Message-ID: <8dd814c0-039e-c8aa-2588-9c1edbadaf47@oss.qualcomm.com> Date: Wed, 18 Mar 2026 10:54:07 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail Content-Language: en-US To: Dmitry Baryshkov , Bjorn Andersson , Konrad Dybcio , Taniya Das , Vikash Garodia , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Stephan Gerhold , Neil Armstrong , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260313-iris-fix-corners-v1-0-32a393c25dda@oss.qualcomm.com> <20260313-iris-fix-corners-v1-5-32a393c25dda@oss.qualcomm.com> From: Dikshita Agarwal In-Reply-To: <20260313-iris-fix-corners-v1-5-32a393c25dda@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=T4+BjvKQ c=1 sm=1 tr=0 ts=69ba36fe cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=RgczR8+8wRjDfzPIf2UjDw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=nRN9RV7npC2xITY7ZkQA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzE4MDA0MyBTYWx0ZWRfXwdvFxvLteX1b SVrp0F5B1ok6OLTMEtTBiVFoXuHsjpAGUDyZV4fMbKG8ag0rPu0H56mBWDBxv74Y3/hyC+I38ps bwqnhANN3dY/uDYl1e8i15/gYl+8BlkYfwVucx6gEhJxtETVCYJj58ncv/Jyc2e89+Xl4BclPyI vdM86v2SR4nHIPcczxd99RadfbFOoqjGkzHYJAyXn4Sw1ohXBOF2LEUsj+E2zmjaRrbDcnTZZmu 1y0ZpBijwNfS3r78txqM/yVvK5inNK+DYJz13RppWw8Ggd91Fg/5z6T6rDIaeqFk8wGEQTAhHk1 M/owLgrlChp3jbf1wxv7YyuRK2hQQYZVQ2H5VayIrDpV4taAAQfuFElxLSBm/4oHIWCqTSkLHJz MsD51Z8hP3pZs+HgpCXWbIB8vyZobdO64OtIM0vCTvrUAw9RRPsc/1cuZhTH9Vbm4Wm6fv6/dW5 Xva6Z/oJ6rmGWgSoOCw== X-Proofpoint-GUID: NVdYuIbAn3B8S6bhGiEOlCU66B4iPAjO X-Proofpoint-ORIG-GUID: NVdYuIbAn3B8S6bhGiEOlCU66B4iPAjO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-17_05,2026-03-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 phishscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603180043 On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote: > The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always > match the PLL corners on the MXC rail. Correct the performance corners > for the MXC rail following the PLL documentation. > > Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node") > Signed-off-by: Dmitry Baryshkov > --- > arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi > index 357e43b90740..9437360ea215 100644 > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi > @@ -5236,13 +5236,13 @@ opp-196000000 { > > opp-300000000 { > opp-hz = /bits/ 64 <300000000>; I see in the document that this level value should be 280000000, could you pls check and update accordingly. > - required-opps = <&rpmhpd_opp_low_svs>, > + required-opps = <&rpmhpd_opp_svs>, > <&rpmhpd_opp_low_svs>; > }; > > opp-380000000 { > opp-hz = /bits/ 64 <380000000>; > - required-opps = <&rpmhpd_opp_svs>, > + required-opps = <&rpmhpd_opp_svs_l1>, > <&rpmhpd_opp_svs>; > }; > > @@ -5254,13 +5254,13 @@ opp-435000000 { > > opp-480000000 { > opp-hz = /bits/ 64 <480000000>; > - required-opps = <&rpmhpd_opp_nom>, > + required-opps = <&rpmhpd_opp_svs_l1>, > <&rpmhpd_opp_nom>; > }; > > opp-533333334 { > opp-hz = /bits/ 64 <533333334>; > - required-opps = <&rpmhpd_opp_turbo>, > + required-opps = <&rpmhpd_opp_svs_l1>, > <&rpmhpd_opp_turbo>; > }; > }; > with above comment addressed. Reviewed-by: Dikshita Agarwal Thanks, Dikshita