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From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Williams, Gregory" <gregoryw@amd.com>,
	Gregory Williams <gregory.williams@amd.com>,
	ogabbay@kernel.org, michal.simek@amd.com, robh@kernel.org
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH V1 3/9] dt-bindings: power: Add AMD Versal power domain bindings
Date: Thu, 10 Jul 2025 23:34:29 +0200	[thread overview]
Message-ID: <8dd8588c-2384-4999-8433-9ebcf7d5a863@kernel.org> (raw)
In-Reply-To: <d4beb853-12a4-43ec-96af-9f6a7881600f@amd.com>

On 10/07/2025 20:53, Williams, Gregory wrote:
>>
>>
>>>  1 file changed, 55 insertions(+)
>>>  create mode 100644 include/dt-bindings/power/xlnx-versal-power.h
>>>
>>> diff --git a/include/dt-bindings/power/xlnx-versal-power.h b/include/dt-bindings/power/xlnx-versal-power.h
>>> new file mode 100644
>>> index 000000000000..effbc70e5a12
>>> --- /dev/null
>>> +++ b/include/dt-bindings/power/xlnx-versal-power.h
>>> @@ -0,0 +1,55 @@
>>> +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
>>> +/*
>>> + *  Copyright (C) 2019 - 2021 Xilinx, Inc.
>>> + *  Copyright (C) 2024 Advanced Micro Devices, Inc.
>>> + */
>>> +
>>> +#ifndef _DT_BINDINGS_VERSAL_POWER_H
>>> +#define _DT_BINDINGS_VERSAL_POWER_H
>>> +
>>> +#define PM_DEV_RPU0_0                                (0x18110005U)
>>> +#define PM_DEV_RPU0_1                                (0x18110006U)
>>
>> Bindings ID start from 0 or 1 and are decimal numbers. None of these are
>> bindings (and commit msg does not explain here anything).
>>
>> Also, where is the compatible using these? Why is this a separate patch?
> In 'Submitting DT binding patches' it says: "The Documentation/ and include/dt-bindings/ portion of the patch should be a separate patch".

Separate from the driver. But that's a single patch.


Best regards,
Krzysztof

  reply	other threads:[~2025-07-10 21:34 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-02 15:56 [PATCH V1 0/9] AMD AI Engine device driver for Versal Gregory Williams
2025-07-02 15:56 ` [PATCH V1 1/9] firmware: xilinx: Add IOCTL support for the AIE run time operations Gregory Williams
2025-07-03  6:50   ` Krzysztof Kozlowski
2025-07-10 18:49     ` Williams, Gregory
2025-07-02 15:56 ` [PATCH V1 2/9] firmware: xilinx: Add IOCTL support to query QoS Gregory Williams
2025-07-02 15:56 ` [PATCH V1 3/9] dt-bindings: power: Add AMD Versal power domain bindings Gregory Williams
2025-07-03  6:43   ` Krzysztof Kozlowski
2025-07-10 18:53     ` Williams, Gregory
2025-07-10 21:34       ` Krzysztof Kozlowski [this message]
2025-07-02 15:56 ` [PATCH V1 4/9] dt-bindings: soc: xilinx: Add AI engine DT binding Gregory Williams
2025-07-03  6:48   ` Krzysztof Kozlowski
2025-07-10 19:03     ` Williams, Gregory
2025-07-10 21:38       ` Krzysztof Kozlowski
2025-07-11 18:33         ` Williams, Gregory
2025-07-12  7:33           ` Krzysztof Kozlowski
2025-07-14 14:51             ` Williams, Gregory
2025-07-02 15:56 ` [PATCH V1 5/9] accel: amd-ai-engine: Add AMD AI Engine device driver Gregory Williams
2025-07-02 15:56 ` [PATCH V1 6/9] accel: amd-ai-engine: Add support to enable/disable clocks and change clock frequency Gregory Williams
2025-07-02 15:56 ` [PATCH V1 7/9] accel: amd-ai-engine: Add support for AIEML devices Gregory Williams
2025-07-02 15:56 ` [PATCH V1 8/9] accel: amd-ai-engine: Create tile memory information Gregory Williams
2025-07-02 15:56 ` [PATCH V1 9/9] accel: amd-ai-engine: Adds AI Engine reset operations Gregory Williams

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