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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e816968bfbsm7331474a12.17.2025.03.18.03.24.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Mar 2025 03:25:00 -0700 (PDT) Message-ID: <8e830d99-61d1-43c0-bcd3-a8b669fcc2bb@oss.qualcomm.com> Date: Tue, 18 Mar 2025 11:24:57 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] arm64: dts: qcom: sm6350: Add OPP table support to UFSHC To: Luca Weiss , Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250314-sm6350-ufs-things-v1-0-3600362cc52c@fairphone.com> <20250314-sm6350-ufs-things-v1-2-3600362cc52c@fairphone.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: ZA4tzLo94QTOeG9UoHKzfxBruytAXTKq X-Proofpoint-GUID: ZA4tzLo94QTOeG9UoHKzfxBruytAXTKq X-Authority-Analysis: v=2.4 cv=aMLwqa9m c=1 sm=1 tr=0 ts=67d949fe cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=6H0WHjuAAAAA:8 a=EUspDBNiAAAA:8 a=4oVbTNSGWYtvGuB_2MIA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=Soq9LBFxuPC4vsCAQt-j:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-18_05,2025-03-17_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 spamscore=0 clxscore=1015 phishscore=0 mlxscore=0 suspectscore=0 malwarescore=0 mlxlogscore=999 bulkscore=0 adultscore=0 lowpriorityscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503180076 On 3/17/25 1:12 PM, Luca Weiss wrote: > Hi Konrad, > > On Fri Mar 14, 2025 at 11:08 PM CET, Konrad Dybcio wrote: >> On 3/14/25 10:17 AM, Luca Weiss wrote: >>> UFS host controller, when scaling gears, should choose appropriate >>> performance state of RPMh power domain controller along with clock >>> frequency. So let's add the OPP table support to specify both clock >>> frequency and RPMh performance states replacing the old "freq-table-hz" >>> property. >>> >>> Signed-off-by: Luca Weiss >>> --- >> >> [...] >> >>> + >>> + ufs_opp_table: opp-table { >>> + compatible = "operating-points-v2"; >>> + >>> + opp-50000000 { >>> + opp-hz = /bits/ 64 <50000000>, >>> + /bits/ 64 <0>, >>> + /bits/ 64 <0>, >>> + /bits/ 64 <37500000>, >> >> This rate on this clk requires opp_svs (not low_svs) > > Not sure where you're seeing this? > > This is from my msm-4.19 tree: > > gcc_ufs_phy_axi_clk_src: > .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 50000000, > gcc_ufs_phy_unipro_core_clk_src: > .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 37500000, > gcc_ufs_phy_ice_core_clk_src: > .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 75000000, > > [VDD_LOWER] = RPMH_REGULATOR_LEVEL_LOW_SVS, > > My intepretation for this is we need low_svs? Hm, I took another look and it seems you're right, I must have misread Reviewed-by: Konrad Dybcio Konrad