From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: "Krzysztof Kozlowski" <krzk@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Peter Griffin" <peter.griffin@linaro.org>,
"André Draszik" <andre.draszik@linaro.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Alim Akhtar" <alim.akhtar@samsung.com>,
"Sylwester Nawrocki" <s.nawrocki@samsung.com>,
"Chanwoo Choi" <cw00.choi@samsung.com>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org, willmcvicker@google.com,
kernel-team@android.com
Subject: Re: [PATCH v3 3/5] clk: samsung: add Exynos ACPM clock driver
Date: Mon, 8 Sep 2025 11:55:15 +0100 [thread overview]
Message-ID: <8eb616f2-32bc-4715-8775-b1e896cee908@linaro.org> (raw)
In-Reply-To: <32a28a8c-2429-4d61-88f0-b7e3e866f85e@kernel.org>
On 9/8/25 8:45 AM, Krzysztof Kozlowski wrote:
> On 08/09/2025 09:39, Tudor Ambarus wrote:
>>>> +
>>>> + aclks = devm_kcalloc(dev, count, sizeof(*aclks), GFP_KERNEL);
>>>> + if (!aclks)
>>>> + return -ENOMEM;
>>>> +
>>>> + for (i = 0; i < count; i++) {
>>>> + const struct acpm_clk_variant *variant = &drv_data->clks[i];
>>>> + unsigned int id = variant->id;
>>>> + struct acpm_clk *aclk;
>>>> +
>>>> + if (id >= count)
>>>
>>> This is not possible. You control the IDs build time, so this must be
>>> either build time check or no check. I vote for no check, because I
>>
>> using BUILD_BUG_ON_MSG? that would work, see below the why.
>>
>>> don't think the ID is anyhow related to number of clocks. What if (not
>>> recommended but what if) the IDs have a gap and next ID is 1000. I see
>>> your code using ID:
>>>
>>>
>>>> + return dev_err_probe(dev, -EINVAL,
>>>> + "Invalid ACPM clock ID.\n");
>>>> +
>>>> + aclk = &aclks[id];
>>>> + aclk->id = id;
>>>> + aclk->handle = acpm_handle;
>>>> + aclk->mbox_chan_id = mbox_chan_id;
>>>> +
>>>> + hws[id] = &aclk->hw;
>>>
>>> ^^^ here, but why do you need it? Why it cannot be hws[i]?
>>
>> so that it works correctly with of_clk_hw_onecell_get() in case the clocks
>
> Ah true, hws[] has to be indexed by ID.
>
>> IDs are not starting from 0 or are reordered when defined. For example let's
>> consider clock ID 1 is wrongly defined at index 0 in the array. When someone
>> references clock ID 1 in the device tree, and we use of_clk_hw_onecell_get,
>> it would get the clock defined at index 1.
>>
>> In my case the clocks start from index 0 and they are defined in ascending
>> order with no gaps, so the check is gratuitously made. I wanted to have some
>> sanity check. Do you still think I shall remove the check and use hws[i]?
>
>
> Look at some users of of_clk_hw_onecell_get() - they all don't care
> about this and do:
>
> 441 for (idx = 0; idx < count; idx++) {
> 442 struct scmi_clk *sclk = &sclks[idx];
>
> without any checks.
I saw, it felt a bit rugged at first when reading it, but not so more now,
see below why.
>
> I just do not see why runtime check is necessary. This is purely build
> time relation and either we do not care, because the code should be
> synced between one and other place, or (if you care) then it must be
> build time check.
>
I tried the following:
+/*
+ * Use a static assertion to check that the clock IDs are sequential
+ * and do not have gaps. This check is performed at compile-time.
+ */
+static void acpm_clk_build_check(void)
+{
+ BUILD_BUG_ON_MSG(gs101_acpm_clks[ARRAY_SIZE(gs101_acpm_clks) - 1].id !=
+ (ARRAY_SIZE(gs101_acpm_clks) - 1),
+ "ACPM clock IDs are not sequential or have gaps.");
+}
and then in probe() called it. It works in a few cases, but it leaves the
possibility open for the intermediate clocks to have unrestricted values,
even if last-clk-id == nr-clks - 1;
So to be comprehensive I'd have to combine a build time check with a run-time
check. Which feels like over engineering. The assumptions scmi and other do
don't look that bad now :).
I'll drop the sanity checks and use hws[i] instead of hws[id] so that at
least there's no out of array accesses in case the writer really mangles
the clock definitions.
Thanks,
ta
next prev parent reply other threads:[~2025-09-08 10:55 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-03 13:56 [PATCH v3 0/5] exynos-acpm: add DVFS protocol and " Tudor Ambarus
2025-09-03 13:56 ` [PATCH v3 1/5] dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks Tudor Ambarus
2025-09-03 13:56 ` [PATCH v3 2/5] firmware: exynos-acpm: add DVFS protocol Tudor Ambarus
2025-09-03 13:56 ` [PATCH v3 3/5] clk: samsung: add Exynos ACPM clock driver Tudor Ambarus
2025-09-06 12:19 ` Krzysztof Kozlowski
2025-09-08 7:39 ` Tudor Ambarus
2025-09-08 7:45 ` Krzysztof Kozlowski
2025-09-08 10:55 ` Tudor Ambarus [this message]
2025-09-08 13:09 ` Tudor Ambarus
2025-09-03 13:56 ` [PATCH v3 4/5] firmware: exynos-acpm: register ACPM clocks pdev Tudor Ambarus
2025-09-06 12:20 ` Krzysztof Kozlowski
2025-09-08 7:46 ` Tudor Ambarus
2025-09-03 13:56 ` [PATCH v3 5/5] arm64: defconfig: enable Exynos ACPM clocks Tudor Ambarus
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