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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8dbf1c0213sm406769266b.48.2026.01.30.02.53.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Jan 2026 02:53:11 -0800 (PST) Message-ID: <8ec07e5b-b83c-4e76-a49a-933420ab55d5@oss.qualcomm.com> Date: Fri, 30 Jan 2026 11:53:09 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine To: Umang Chheda , andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, richardcochran@gmail.com, Andrew Lunn Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mohd.anwar@oss.qualcomm.com, krishna.chundru@oss.qualcomm.com, monish.chunara@oss.qualcomm.com References: <20260129172850.1175728-1-umang.chheda@oss.qualcomm.com> <20260129172850.1175728-2-umang.chheda@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260129172850.1175728-2-umang.chheda@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: rSawLVV6dDxnyOigptDb_bnpIobZwYuU X-Proofpoint-GUID: rSawLVV6dDxnyOigptDb_bnpIobZwYuU X-Authority-Analysis: v=2.4 cv=VMTQXtPX c=1 sm=1 tr=0 ts=697c8d9a cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=2ybyCHOLog1-fLgjBY0A:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTMwMDA4OCBTYWx0ZWRfX0sWQ4jhMt0nx 5jhtiNekMOE3AhehlWEtah+TW3feGsbWmGIFH4M9t6c4PMWkTu3PEG0M9lubUNLS2RboAAAhB/H SOf7mgVwJ0mH8sSCIrOkkVXgxaygV4/JKZEr0L+XvV282oggrhRZZupQvHlTrJdSlY1oAXwj7uF /IaUPmJM23Nrxprbq060T67QQdeTry+VM1+EcWxHM0QDrvLP56mmsHG/dL0bBHY0FfeNBUo9b7D RhWl1K+XsCbn8g87OwtwHGCA3jYfUniW47tNtqz8XUL1abdDqnJ7r9/G7Nw0054LAZvdRC8EiZt m2b8nB69kNqMop405gCrEkDoAxcCIprH4I4e6C4CYcJDTdhyrHSczUBHfxPq6oTVPx7s2Tw4mfe xyaZDgFgZ42584/znhO+gfsiHEyLKDV0Cm6qxTsNgxF57RjQe8MrJVu2DDZnEugdAopUhsUjKQQ 9Nh2Q793TDEA6q0YVSQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-30_01,2026-01-29_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 bulkscore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 phishscore=0 suspectscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601300088 On 1/29/26 6:28 PM, Umang Chheda wrote: > The Mezzanine is an hardware expansion add-on board designed > to be stacked on top of Lemans EVK. [...] > +ðernet1 { > + phy-handle = <&hsgmii_phy1>; > + phy-mode = "2500base-x"; +Andrew could you please take a look at the eth setup? Konrad > + > + pinctrl-0 = <ðernet1_default>; > + pinctrl-names = "default"; > + > + snps,mtl-rx-config = <&mtl_rx_setup1>; > + snps,mtl-tx-config = <&mtl_tx_setup1>; > + > + nvmem-cells = <&mac_addr1>; > + nvmem-cell-names = "mac-address"; > + > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + hsgmii_phy1: ethernet-phy@18 { > + compatible = "ethernet-phy-id004d.d101"; > + reg = <0x18>; > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > + }; > + > + mtl_rx_setup1: rx-queues-config { > + snps,rx-queues-to-use = <4>; > + snps,rx-sched-sp; > + > + queue0 { > + snps,dcb-algorithm; > + snps,map-to-dma-channel = <0x0>; > + snps,route-up; > + snps,priority = <0x1>; > + }; > + > + queue1 { > + snps,dcb-algorithm; > + snps,map-to-dma-channel = <0x1>; > + snps,route-ptp; > + }; > + > + queue2 { > + snps,avb-algorithm; > + snps,map-to-dma-channel = <0x2>; > + snps,route-avcp; > + }; > + > + queue3 { > + snps,avb-algorithm; > + snps,map-to-dma-channel = <0x3>; > + snps,priority = <0xc>; > + }; > + }; > + > + mtl_tx_setup1: tx-queues-config { > + snps,tx-queues-to-use = <4>; > + > + queue0 { > + snps,dcb-algorithm; > + }; > + > + queue1 { > + snps,dcb-algorithm; > + }; > + > + queue2 { > + snps,avb-algorithm; > + snps,send_slope = <0x1000>; > + snps,idle_slope = <0x1000>; > + snps,high_credit = <0x3e800>; > + snps,low_credit = <0xffc18000>; > + }; > + > + queue3 { > + snps,avb-algorithm; > + snps,send_slope = <0x1000>; > + snps,idle_slope = <0x1000>; > + snps,high_credit = <0x3e800>; > + snps,low_credit = <0xffc18000>; > + }; > + }; > +}; > + > +&i2c18 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@52 { > + compatible = "giantec,gt24c256c", "atmel,24c256"; > + reg = <0x52>; > + pagesize = <64>; > + > + nvmem-layout { > + compatible = "fixed-layout"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + mac_addr1: mac-addr@0 { > + reg = <0x0 0x6>; > + }; > + }; > + }; > +}; > + > +&pcie0 { > + iommu-map = <0x0 &pcie_smmu 0x0 0x1>, > + <0x100 &pcie_smmu 0x1 0x1>, > + <0x208 &pcie_smmu 0x2 0x1>, > + <0x210 &pcie_smmu 0x3 0x1>, > + <0x218 &pcie_smmu 0x4 0x1>, > + <0x300 &pcie_smmu 0x5 0x1>, > + <0x400 &pcie_smmu 0x6 0x1>, > + <0x500 &pcie_smmu 0x7 0x1>, > + <0x501 &pcie_smmu 0x8 0x1>; > +}; > + > +&pcieport0 { > + #address-cells = <3>; > + #size-cells = <2>; > + > + pcie@0,0 { > + compatible = "pci1179,0623"; > + reg = <0x10000 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + > + device_type = "pci"; > + ranges; > + bus-range = <0x2 0xff>; > + > + vddc-supply = <&vreg_0p9>; > + vdd18-supply = <&vreg_1p8>; > + vdd09-supply = <&vreg_0p9>; > + vddio1-supply = <&vreg_1p8>; > + vddio2-supply = <&vreg_1p8>; > + vddio18-supply = <&vreg_1p8>; > + > + i2c-parent = <&i2c18 0x77>; > + > + resx-gpios = <&tlmm 140 GPIO_ACTIVE_LOW>; > + > + pinctrl-0 = <&tc9563_resx_n>; > + pinctrl-names = "default"; > + > + pcie@1,0 { > + reg = <0x20800 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + > + device_type = "pci"; > + ranges; > + bus-range = <0x3 0xff>; > + }; > + > + pcie@2,0 { > + reg = <0x21000 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + > + device_type = "pci"; > + ranges; > + bus-range = <0x4 0xff>; > + }; > + > + pcie@3,0 { > + reg = <0x21800 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges; > + bus-range = <0x5 0xff>; > + > + pci@0,0 { > + reg = <0x50000 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges; > + }; > + > + pci@0,1 { > + reg = <0x50100 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges; > + }; > + }; > + }; > +}; > + > +&serdes1 { > + phy-supply = <&vreg_l5a>; > + > + status = "okay"; > +}; > + > +&tlmm { > + ethernet1_default: ethernet1-default-state { > + ethernet1_mdc: ethernet1-mdc-pins { > + pins = "gpio20"; > + function = "emac1_mdc"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + > + ethernet1_mdio: ethernet1-mdio-pins { > + pins = "gpio21"; > + function = "emac1_mdio"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + }; > + > + tc9563_resx_n: tc9563-resx-state { > + pins = "gpio140"; > + function = "gpio"; > + > + bias-disable; > + input-disable; > + output-enable; > + power-source = <0>; > + }; > +}; > -- > 2.34.1 > >