From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDCDC2FFFA3 for ; Thu, 19 Feb 2026 19:20:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771528860; cv=none; b=qOp39IGFr4dQ6xzs5OfLyCamilN+F8gcV7iVrUeYk1gviu90lQ1BElOvsqffEAgezS1AvWNoyX3iVCO1obDwYcWtSHo09cVvOLCxv9V616fbQQkmZDIo/2Tr+BMTjXaiHGd9FZhUH1QLyGKDDfb77+GYFBqNW22jamjyWBNrXlk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771528860; c=relaxed/simple; bh=rHG76F5L8bmwnvgccQsgIiHDw6yRs+dZ8c64BSolkFA=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=fiqYLaNNQ93hOqOs0HaJXoL9NEU7INlXmfWdA/FpJbBN6EVf7UtJEUNVfGnLsyrp2VQDDTa7j8//hYZxXbKsXfHAx5IhIX8MQWHLaywuB6cae7/uBNbt9vrSb/ovgp1ohIkklg1VPIuAp8ydArSgiAx6laRICQRQtYvQkjoD5fY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Pechp88U; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Pechp88U" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1771528859; x=1803064859; h=message-id:subject:from:to:cc:date:in-reply-to: references:content-transfer-encoding:mime-version; bh=rHG76F5L8bmwnvgccQsgIiHDw6yRs+dZ8c64BSolkFA=; b=Pechp88UdCgg1WcNeBkN7q2BX/LElMvo2519paTMTKkxKI2LjAyJVAtK Ki79Iwrpe4KE77IEFsclaD4NDEUoo3A6vrMoJOBS3X8e3nMLl8b3Gm/j3 KxIQWo6AB3STR4wlx8pyyAFXes1F85A6i/D7AnGbpUt8Fdox7RJ0dhwUi +BEm5kmRQ1HQRt/dvca69N1a5bzcpybl3ZHqwpFdVNXA62rti1e7zwC74 PB/DJWiOOtTGzA/m98DASE6+xx/pUfXPP2qOJQfuXoHihluFr8HqwfLlz TqZ5+MmKXepYahRoen0Lfmbj/G2xPiEHrOE/UATlm2KsYS84V+BISbuL2 A==; X-CSE-ConnectionGUID: OF6fPrpUTvmsQIB2BfantQ== X-CSE-MsgGUID: c2Rzq0M4SKKIXWIlAHdmuA== X-IronPort-AV: E=McAfee;i="6800,10657,11706"; a="98088564" X-IronPort-AV: E=Sophos;i="6.21,300,1763452800"; d="scan'208";a="98088564" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2026 11:20:58 -0800 X-CSE-ConnectionGUID: LmJSyRh0R8uJTYxjzGAHHA== X-CSE-MsgGUID: OMlwMxzXSV6Tc90HXVkoJQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,300,1763452800"; d="scan'208";a="214743753" Received: from unknown (HELO [10.241.243.83]) ([10.241.243.83]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2026 11:20:57 -0800 Message-ID: <8f558b1d8743be75e6d033e6217b8ddf95ea91b8.camel@linux.intel.com> Subject: Re: [PATCH v3 04/21] sched/cache: Make LLC id continuous From: Tim Chen To: "Chen, Yu C" , Peter Zijlstra Cc: Ingo Molnar , K Prateek Nayak , "Gautham R . Shenoy" , Vincent Guittot , Juri Lelli , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Madadi Vineeth Reddy , Hillf Danton , Shrikanth Hegde , Jianyong Wu , Yangyu Chen , Tingyin Duan , Vern Hao , Vern Hao , Len Brown , Aubrey Li , Zhao Liu , Chen Yu , Adam Li , Aaron Lu , Tim Chen , Josh Don , Gavin Guo , Qais Yousef , Libo Chen , linux-kernel@vger.kernel.org Date: Thu, 19 Feb 2026 11:20:57 -0800 In-Reply-To: References: <60a05a3f50d14a7bf3b968f62cca87893c5c552c.1770760558.git.tim.c.chen@linux.intel.com> <20260219145908.GH1395266@noisy.programming.kicks-ass.net> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.1 (3.58.1-1.fc43) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Thu, 2026-02-19 at 23:20 +0800, Chen, Yu C wrote: > On 2/19/2026 10:59 PM, Peter Zijlstra wrote: > > On Tue, Feb 10, 2026 at 02:18:44PM -0800, Tim Chen wrote: > >=20 > > > diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c > > > index cf643a5ddedd..ca46b5cf7f78 100644 > > > --- a/kernel/sched/topology.c > > > +++ b/kernel/sched/topology.c > > > @@ -20,6 +20,7 @@ void sched_domains_mutex_unlock(void) > > > /* Protected by sched_domains_mutex: */ > > > static cpumask_var_t sched_domains_tmpmask; > > > static cpumask_var_t sched_domains_tmpmask2; > > > +static int tl_max_llcs; > > > =20 > > > static int __init sched_debug_setup(char *str) > > > { > > > @@ -658,7 +659,7 @@ static void destroy_sched_domains(struct sched_do= main *sd) > > > */ > > > DEFINE_PER_CPU(struct sched_domain __rcu *, sd_llc); > > > DEFINE_PER_CPU(int, sd_llc_size); > > > -DEFINE_PER_CPU(int, sd_llc_id); > > > +DEFINE_PER_CPU(int, sd_llc_id) =3D -1; > > > DEFINE_PER_CPU(int, sd_share_id); > > > DEFINE_PER_CPU(struct sched_domain_shared __rcu *, sd_llc_shared); > > > DEFINE_PER_CPU(struct sched_domain __rcu *, sd_numa); > > > @@ -684,7 +685,6 @@ static void update_top_cache_domain(int cpu) > > > =20 > > > rcu_assign_pointer(per_cpu(sd_llc, cpu), sd); > > > per_cpu(sd_llc_size, cpu) =3D size; > > > - per_cpu(sd_llc_id, cpu) =3D id; > > > rcu_assign_pointer(per_cpu(sd_llc_shared, cpu), sds); > > > =20 > > > sd =3D lowest_flag_domain(cpu, SD_CLUSTER); > > > @@ -2567,10 +2567,18 @@ build_sched_domains(const struct cpumask *cpu= _map, struct sched_domain_attr *att > > > =20 > > > /* Set up domains for CPUs specified by the cpu_map: */ > > > for_each_cpu(i, cpu_map) { > > > - struct sched_domain_topology_level *tl; > > > + struct sched_domain_topology_level *tl, *tl_llc =3D NULL; > > > + int lid; > > > =20 > > > sd =3D NULL; > > > for_each_sd_topology(tl) { > > > + int flags =3D 0; > > > + > > > + if (tl->sd_flags) > > > + flags =3D (*tl->sd_flags)(); > > > + > > > + if (flags & SD_SHARE_LLC) > > > + tl_llc =3D tl; > > > =20 > > > sd =3D build_sched_domain(tl, cpu_map, attr, sd, i); > > > =20 > > > @@ -2581,6 +2589,39 @@ build_sched_domains(const struct cpumask *cpu_= map, struct sched_domain_attr *att > > > if (cpumask_equal(cpu_map, sched_domain_span(sd))) > > > break; > > > } > > > + > > > + lid =3D per_cpu(sd_llc_id, i); > > > + if (lid =3D=3D -1) { > > > + int j; > > > + > > > + /* > > > + * Assign the llc_id to the CPUs that do not > > > + * have an LLC. > > > + */ > >=20 > > Where does this happen? Is this for things like Atom that don't have an > > L3 and so we don't set up a LLC domain? > >=20 >=20 > Yes, for some hybrid platforms, some CPUs on that platforms might not=20 > have L3, > Tim might correct me if I=E2=80=99m wrong. Above code is derived from the= =20 > update_top_cache_domain(), > if there is no sched domain with SD_SHARE_LLC, per_cpu(sd_llc_id, cpu)= =20 > is set to the > CPU number directly. >=20 That's correct. One example is Meteor Lake where some Atom CPUs don't have L3 but have only L2. And some Ampere CPUs also have no shared L3. https://www.spinics.net/lists/kernel/msg5863118.html?utm_source=3Dchatgpt.c= om This also reminded me that if we rely on cpu_coregroup_mask for LLC id assignment, we may be missing out such platforms which need to treat=C2=A0 L2 as the last level cache. So we may need to fallback to cpu_clustergroup= _mask or cpu_smt_mask where applicable. Tim=20 > thanks, > Chenyu >=20