From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E229C47084 for ; Thu, 7 Apr 2022 01:31:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241492AbiDGBbJ (ORCPT ); Wed, 6 Apr 2022 21:31:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240476AbiDGBUB (ORCPT ); Wed, 6 Apr 2022 21:20:01 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FFC11877DF for ; Wed, 6 Apr 2022 18:16:27 -0700 (PDT) X-UUID: 4faf0ad1f71f4071a821c860f7d89bd2-20220407 X-UUID: 4faf0ad1f71f4071a821c860f7d89bd2-20220407 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 921465962; Thu, 07 Apr 2022 09:16:16 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 7 Apr 2022 09:16:15 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 7 Apr 2022 09:16:15 +0800 Message-ID: <8fbabb83e838169697a06a1b525252c99018a93f.camel@mediatek.com> Subject: Re: [RESEND v4 PATCH] drm/mediatek: Fix mtk_cec_mask() From: CK Hu To: Miles Chen , Chun-Kuang Hu , Philipp Zabel , "David Airlie" , Daniel Vetter , "Matthias Brugger" , Jie Qiu , "Junzhi Zhao" CC: Zhiqiang Lin , AngeloGioacchino Del Regno , , , , Date: Thu, 7 Apr 2022 09:16:15 +0800 In-Reply-To: <20220315232301.2434-1-miles.chen@mediatek.com> References: <20220315232301.2434-1-miles.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Miles: On Wed, 2022-03-16 at 07:23 +0800, Miles Chen wrote: > In current implementation, mtk_cec_mask() writes val into target > register > and ignores the mask. After talking to our hdmi experts, > mtk_cec_mask() > should read a register, clean only mask bits, and update (val | mask) > bits > to the register. Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, CK > > Fixes: 8f83f26891e1 ("drm/mediatek: Add HDMI support") > Signed-off-by: Miles Chen > Reviewed-by: Chun-Kuang Hu > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > Reviewed-by: Matthias Brugger > Cc: Zhiqiang Lin > Cc: CK Hu > Cc: Matthias Brugger > Cc: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > > --- > > Change since v1: > add Fixes tag > > Change since v2: > add explanation of mtk_cec_mask() > > Change since v3: > change misleading subject and modify the commit message since this is > a bug fix patch > > --- > drivers/gpu/drm/mediatek/mtk_cec.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_cec.c > b/drivers/gpu/drm/mediatek/mtk_cec.c > index e9cef5c0c8f7..cdfa648910b2 100644 > --- a/drivers/gpu/drm/mediatek/mtk_cec.c > +++ b/drivers/gpu/drm/mediatek/mtk_cec.c > @@ -85,7 +85,7 @@ static void mtk_cec_mask(struct mtk_cec *cec, > unsigned int offset, > u32 tmp = readl(cec->regs + offset) & ~mask; > > tmp |= val & mask; > - writel(val, cec->regs + offset); > + writel(tmp, cec->regs + offset); > } > > void mtk_cec_set_hpd_event(struct device *dev,