From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=185.70.43.100 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1793818315; b=wzghiuGpm8rk0GGJgnInVhInZnvIGCbeNoRAo+C6+ntLyc4bW/OkGcpr+hrGUnCffmC+ oB/s3rhG01fitA98MWRxQgV/woU6vPJvLVbQGNsUThJIUK0IBHvLQ5QUg5mp9XJU1Y9ap jlN+DW6jvfJWmh4QT1LhCeCbiki8iLKV+B/JvCp0VOhLrI6fcoZe67CZrBOR+P8hHbbkX 7jNzFjk+aXUgyNjFQr6E+p9Mj5tNdvEU0sekHGSnoc/EDlKulQTRZ10kVArpmgwaKgb3v lMkajmmBp1n5vkCdsXblT3euvu/YNEMV/aDaQr02RcNYzmHmoFI+Q1l2zbcU4fdc4Lg== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1793818315; h=DMARC-Filter:DKIM-Signature:Date:To:From:Cc:Subject:Message-ID: Feedback-ID:X-Pm-Message-ID:MIME-Version:Content-Type: Content-Transfer-Encoding; bh=FPPm4Ifo7WxrNg+H9UhHD74zvq+SEmbeIyWBnjDCO4A=; b=5JK4LogjKm91GSIQ4D0opHea9qHgn8Nt73ClWxjRr7ybb88xOjpKXJWOI9HkuGL1hcwb c3E+5jGKEpGyoD5A/vWNaHSZpQTNMJJjBzQdxFRtu0ApjWUs9WauPAK4D7cwdJlssS5KO qog6Ss4z3zLL5/37EvMyDBkMF0JxwrQHvbntfd/MccsE2tUX6L9qt2zQELPTcC3CJUwV1 o8aH6FyigcylCZt/11fvlvbI3nJpU7e2Wu3UcUhOxvreYu1XSv3NxMmL2i2wa/eLYcna1 pkvom8B3OOTDUkHQxWhfztjWpZj9yTeQBbbnAusWbDPAQjd+ACXLBDXpety2DIgoVSw== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass header.d=protonmail.com header.i=@protonmail.com header.a=rsa-sha256 header.s=protonmail3 header.b=vxJUKcRu; arc=none smtp.remote-ip=185.70.43.100 Received: from mail-43100.protonmail.ch (mail-43100.protonmail.ch [185.70.43.100]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EFFF2606D80D for ; Wed, 4 Nov 2026 18:51:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.2 smtp.subspace.kernel.org EFFF2606D80D Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=protonmail.com header.i=@protonmail.com header.a=rsa-sha256 header.s=protonmail3 header.b=vxJUKcRu DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1793818308; x=1794077508; bh=FPPm4Ifo7WxrNg+H9UhHD74zvq+SEmbeIyWBnjDCO4A=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=vxJUKcRuU1J3D9RxT0BjZUPto1pvptqtA1sdv7uTPU5Wd5CabFWDfvXI4OhKgYq1b RmVcmxn6lGV0KLIRbmf0XAMW9tsaJOJb1JcYZ3OawY1xtGMmQ4D1it1d0DyD4XwrZs 49Ii/TQ1mULHm9DPR4SJjhxDYPylYoD6cZbwbtgNaM3EOHWW1hvXwL9Y3Bbxen6AiC qNZ+uGwCJzpT6M6sXxSlJZYuTLnSYT2Kma95yD57dtoS02X7DCYbjtNM6n3RuR3GEd sLq0NxA1mvS5iAVouV0Q+anJZF5XV7R5XUU5a50YPpPRfVJ5h5horz6/hQWDSX1bhx SeWJTVGccxEVg== Date: Wed, 04 Nov 2026 18:51:41 +0000 To: AngeloGioacchino Del Regno , chunkuang.hu@kernel.org From: Roman Vivchar Cc: p.zabel@pengutronix.de, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, jitao.shi@mediatek.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, justin.yeh@mediatek.com, jason-jh.lin@mediatek.com Subject: Re: [PATCH v9 02/13] drm/mediatek: Implement Display Stream Compression support Message-ID: <8fcdd2fa-7c9c-4af5-a7b4-45fb881d88a8@protonmail.com> Feedback-ID: 173184497:user:proton X-Pm-Message-ID: 8d12c3e225616d3655c04ed7e4412cce821e564c X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Hi Angelo, I have tested this series with my out-of-tree mt6595 (command mode=20 panel) and mt6768 (video mode) DRM. There's no regressions, but I=20 spotted an issue with kconfig. On 9/16/26 14:08, AngeloGioacchino Del Regno wrote: > Add a real driver for the Display Stream Compression (DSC) Display > Controller IP, implementing support for DSC v1.1 to v1.2. >=20 > In order to do this, it was necessary to remove the basic DSC IP > bypass setup from mtk_ddp_comp: this functionality is retained in > the new mtk_disp_dsc driver, which checks if DSC was actually > requested by other components (with the only one that currently > supports this being DSI) and, if not, it will set BYPASS mode in > the DSC IP. >=20 > Like before, the BYPASS mode is set before starting the DSC IP, > but unlike before, this is being done in the component start > callback instead of the config one. > Notably, the config callback is called by mtk_crtc always > immediately before the calling start callback, so the order of > register writes is retained. > The only real difference is that now this is being done through > CPU writes instead of CMDQ, but since that's called only once > and since it's just three registers, the performance impact will > not be minimal and not even measurable. >=20 > As anticipated, DSC handling was also introduced in the mtk_dsi > driver: when performing dsi_host_attach, the driver now checks > if the DSI panel adds the DSC configuration structure to the > mipi_dsi_device structure and, if it does, it will store a > pointer in the driver-local mtk_dsi structure's `dsc` member. >=20 > The DSI driver will then check whether the DSC configuration > that comes from the panel is valid (in regard to MediaTek DSI) > and will call the DRM API's DSC helpers to calculate and set > all of the const and RC parameters for the actual DSC setup. >=20 > For the time being, even though the latest MediaTek SoCs do > support DSC v1.2, only DSC v1.1 pre-scr support is implemented > as an initial contribution (which is rather big, and 1.2 would > make it even bigger - but that can anyway be implemented later). >=20 > As a last step for validation of DSC parameters in DSI, a check > for the hdisplay against DSC slice sidth and one for vdisplay > against DSC slice height was added to the mode_valid callback, > making sure that H/V are, as expected, multiples of slice W/H. >=20 > Signed-off-by: AngeloGioacchino Del Regno ... > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -18,6 +18,8 @@ > #include