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Fri, 07 Mar 2025 07:38:47 -0800 (PST) Message-ID: <9004166e-5535-4024-8114-9fdb217407bb@linaro.org> Date: Fri, 7 Mar 2025 15:38:45 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 01/21] mtd: spinand: Use more specific naming for the reset op To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Santhosh Kumar K Cc: Pratyush Yadav , Michael Walle , Thomas Petazzoni , Steam Lin , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org References: <20250307-winbond-6-14-rc1-octal-v1-0-45c1e074ad74@bootlin.com> <20250307-winbond-6-14-rc1-octal-v1-1-45c1e074ad74@bootlin.com> Content-Language: en-US From: Tudor Ambarus In-Reply-To: <20250307-winbond-6-14-rc1-octal-v1-1-45c1e074ad74@bootlin.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 3/7/25 3:08 PM, Miquel Raynal wrote: > SPI operations have been initially described through macros implicitly > implying the use of a single SPI SDR bus. Macros for supporting dual and > quad I/O transfers have been added on top, generally inspired by vendor > vendor naming, followed by DTR operations. Soon we might see octal > and even octal DTR operations as well (including the opcode byte). > > Let's clarify what the macro really means by describing the expected bus > topology in the reset macro name. > > Signed-off-by: Miquel Raynal > --- > drivers/mtd/nand/spi/core.c | 2 +- > include/linux/mtd/spinand.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c > index 7a578f3522be93d30a9132cf01831515db77ae38..ea6b48242ad4a4e51c713907ce5cc55022cdb569 100644 > --- a/drivers/mtd/nand/spi/core.c > +++ b/drivers/mtd/nand/spi/core.c > @@ -586,7 +586,7 @@ static int spinand_read_id_op(struct spinand_device *spinand, u8 naddr, > > static int spinand_reset_op(struct spinand_device *spinand) > { > - struct spi_mem_op op = SPINAND_RESET_OP; > + struct spi_mem_op op = SPINAND_RESET_1S_0_0_OP; > int ret; > > ret = spi_mem_exec_op(spinand->spimem, &op); > diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h > index 0da8a1c7740ef5cbbdb2a74858465136638224f4..4f47adbe4566d7813ffd8fbfaddd1a85d88d0208 100644 > --- a/include/linux/mtd/spinand.h > +++ b/include/linux/mtd/spinand.h > @@ -20,7 +20,7 @@ > * Standard SPI NAND flash operations > */ > > -#define SPINAND_RESET_OP \ > +#define SPINAND_RESET_1S_0_0_OP \ Hi, Miquel, Have you seen any reset op with address or data? If not, I'm not really sure whether we shall change the name for these basic operations. Changing them to 1S-0-0 may also indicate that there are resets with address or data fields, which I find confusing. I think the change is good for reads and writes. I'll check further in the series and let you know. Cheers, ta > SPI_MEM_OP(SPI_MEM_OP_CMD(0xff, 1), \ > SPI_MEM_OP_NO_ADDR, \ > SPI_MEM_OP_NO_DUMMY, \ >