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FPLL >> is nowhere to be found. Prefer using names that relate to the >> documentation. >> >> If you must make a name up, you need to have a very good reason and to >> explain it. >> >> Still from the public documentation, this PLL belong in the same device as >> MPLL0, MPLL1, etc ... BUT, I remember correctly the T7 initial >> submission, the fixed PLL and fdivs are supposed to be provided through >> SCMI clocks. Have you checked that ? >> > Yes, I read the initial submission, and I tried first with scmi-smc and > scmi-mailbox, but with no success. > I will try it again and ask khadas team for more information related to > this. The fixed pll and sys clocks registers cannot be accessed in kernel, so these clocks are implemented in the Bootloader BL31. Please ask the Khadas team to contact Amlogic for the latest Bootloader version, then you can use the fixed pll and fdivs SCMI clocks defined in include/dt-bindings/clock/amlogic,t7,scmi.h. Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/dt-bindings/clock/amlogic,t7-scmi.h >>> + >>> static const struct pll_mult_range t7_media_pll_mult_range = { >>> .min = 125, >>> .max = 250, >>> @@ -1047,6 +1056,253 @@ static const struct meson_clkc_data t7_mclk_data = { >>> }, >>> }; >>> [...] > > -- > Best regards, > Ronald > > _______________________________________________ > linux-amlogic mailing list > linux-amlogic@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-amlogic