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Mon, 09 Jun 2025 09:39:42 -0700 (PDT) Message-ID: <902db298b21cf78a2c27ed0cdc002e7f2861c428.camel@gmail.com> Subject: Re: [PATCH v2 3/4] riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC From: Alexander Sverdlin To: Inochi Amaoto , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yixun Lan , Thomas Bonnefille , Ze Huang Cc: Junhui Liu , devicetree@vger.kernel.org, sophgo@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Longbin Li Date: Mon, 09 Jun 2025 18:39:43 +0200 In-Reply-To: <20250608232214.771855-4-inochiama@gmail.com> References: <20250608232214.771855-1-inochiama@gmail.com> <20250608232214.771855-4-inochiama@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Mon, 2025-06-09 at 07:22 +0800, Inochi Amaoto wrote: > Add reset generator node for all CV18XX series SoC. >=20 > Signed-off-by: Inochi Amaoto Reviewed-by: Alexander Sverdlin > --- > =C2=A0arch/riscv/boot/dts/sophgo/cv180x.dtsi=C2=A0=C2=A0=C2=A0 |=C2=A0 7 = ++ > =C2=A0arch/riscv/boot/dts/sophgo/cv18xx-reset.h | 98 ++++++++++++++++++++= +++ > =C2=A02 files changed, 105 insertions(+) > =C2=A0create mode 100644 arch/riscv/boot/dts/sophgo/cv18xx-reset.h --=20 Alexander Sverdlin.