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Mon, 30 Mar 2026 07:44:20 -0700 (PDT) X-Received: by 2002:a05:6a21:328a:b0:39c:4af6:4301 with SMTP id adf61e73a8af0-39c87821730mr13239928637.9.1774881860101; Mon, 30 Mar 2026 07:44:20 -0700 (PDT) Received: from [10.217.223.121] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c76916baab6sm6527687a12.2.2026.03.30.07.44.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 30 Mar 2026 07:44:19 -0700 (PDT) Message-ID: <90375d37-0440-48d9-a3d3-b0b442839d89@oss.qualcomm.com> Date: Mon, 30 Mar 2026 20:14:13 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 3/3] soc: qcom: ice: Set ICE clk to TURBO on probe To: Abhinaba Rakshit , Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Neeraj Soni Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, Konrad Dybcio References: <20260302-enable-ufs-ice-clock-scaling-v7-0-669b96ecadd8@oss.qualcomm.com> <20260302-enable-ufs-ice-clock-scaling-v7-3-669b96ecadd8@oss.qualcomm.com> Content-Language: en-US From: Harshal Dev In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: jMct55KYfq6GABs20i5AQD3TkBA7Ogfc X-Proofpoint-GUID: jMct55KYfq6GABs20i5AQD3TkBA7Ogfc X-Authority-Analysis: v=2.4 cv=EcXFgfmC c=1 sm=1 tr=0 ts=69ca8c45 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=MkXX12_YoDuTWG391pEA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzMwMDExNSBTYWx0ZWRfX18BiuHaQqULR SKO874XvjFR2LiCXko8RUqyxqXL9oQ3sRGcZlRt1PHHxp8ReIJYmXk0AmQW1yBpQESSEeSMhsHF lByPErE2koSmQcBXT1WpYwjmbVp9ZKyE6ko5OGziu4LOqNKx2IDedBbVNpnzR5UsRpESyBE2Ix6 TirkahtLlZUXW+vN9cW/IA+FAH5GJamhNrjL+wkYx9EY84CQ02NYWV8EYr1mDdxp3ix46ZkE21U DHvaNqCS/va5aFEB/dXC0koHIEb/cK5Ao+ljhDXyXPzIuPt6RzXvkQUZCoJ9fIi+upHy7z5frQ3 yMvoUl0BVN+Z6FvEINTa2tUnsGy+t5i+JCQjdQNzXKJ6k/77k+IToMz4GJbkBGVAi8i1htb4KNU /VAFz498WcR7Fzqher6YgJIDiWgllAhUZMd6VyNNPWj04asWs9crGRXkOti1xD6MjT7fzT5PXkW 4SzPrihjHnmuEZmimWw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-29_05,2026-03-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603300115 On 3/23/2026 10:42 PM, Abhinaba Rakshit wrote: > On Mon, Mar 02, 2026 at 04:19:15PM +0530, Abhinaba Rakshit wrote: >> MMC controller lacks a clock scaling mechanism, unlike the UFS >> controller. By default, the MMC controller is set to TURBO mode >> during probe, but the ICE clock remains at XO frequency, >> leading to read/write performance degradation on eMMC. >> >> To address this, set the ICE clock to TURBO during probe to >> align it with the controller clock. This ensures consistent >> performance and avoids mismatches between the controller >> and ICE clock frequencies. >> >> For platforms where ICE is represented as a separate device, >> use the OPP framework to vote for TURBO mode, maintaining >> proper voltage and power domain constraints. >> >> Reviewed-by: Konrad Dybcio >> Signed-off-by: Abhinaba Rakshit >> --- >> drivers/soc/qcom/ice.c | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c >> index 7976a18d9a4cda1ad6b62b66ce011e244d0f6856..e8ee02a709574afa4ebb8e4395a8d899bf1d4976 100644 >> --- a/drivers/soc/qcom/ice.c >> +++ b/drivers/soc/qcom/ice.c >> @@ -659,6 +659,13 @@ static struct qcom_ice *qcom_ice_create(struct device *dev, >> dev_info(dev, "ICE OPP table is not registered, please update your DT\n"); >> } >> >> + if (engine->has_opp) { >> + /* Vote for maximum clock rate for maximum performance */ >> + err = dev_pm_opp_set_rate(dev, INT_MAX); >> + if (err) >> + dev_warn(dev, "Failed boosting the ICE clk to TURBO\n"); >> + } >> + >> engine->core_clk_freq = clk_get_rate(engine->core_clk); >> if (!qcom_ice_check_supported(engine)) >> return ERR_PTR(-EOPNOTSUPP); > > Hi Konrad > > Since you previously reviewed this change, I wanted to share an improved approach > that I recently realized for handling ICE clock scaling in the MMC use‑case. > > So far, we have been voting for the maximum frequency during the ICE device probe > to align with MMC requirements. > But because the ICE probe is common across different storage clients, applying > the MAX vote at probe time may unintentionally impact other storage paths. > > Now that we have a generic scaling API exposed, we can make this logic > MMC‑specific instead. In particular, within sdhci_msm_ice_init(). > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/mmc/host/sdhci-msm.c#n1966, > we can invoke: qcom_ice_scale_clk(ice, INT_MAX, false); > I agree, this is better instead of blindly turning the clk freq to maximum. I was about to ask you to move this to qcom_ice_probe() as per comments in previous commit. However, since you have mentioned this now, I suggest adding a call in sdhci_msm_ice_init() to qcom_ice_clk_scale() immediately after it calls qcom_ice_create(). Regards, Harshal > This ensures the MAX clock vote is applied only in the MMC context, > without altering behavior for other storage clients relying on the ICE driver. > > I believe this results in a cleaner and correctly scoped design. > Let me know your thoughts. > > Abhinaba Rakshit >