From: Ilkka Koskinen <ilkka@os.amperecomputing.com>
To: Besar Wicaksono <bwicaksono@nvidia.com>
Cc: Ilkka Koskinen <ilkka@os.amperecomputing.com>,
Jonathan Corbet <corbet@lwn.net>, Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Robin Murphy <robin.murphy@arm.com>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH v3 1/4] perf: arm_cspmu: Split 64-bit write to 32-bit writes
Date: Wed, 21 Jun 2023 12:05:26 -0700 (PDT) [thread overview]
Message-ID: <903ad734-461-c181-9633-3ff29715cc0@os.amperecomputing.com> (raw)
In-Reply-To: <SJ0PR12MB567659A4B500A2E3FD004452A05CA@SJ0PR12MB5676.namprd12.prod.outlook.com>
Hi Besar,
On Tue, 20 Jun 2023, Besar Wicaksono wrote:
>> -----Original Message-----
>> From: Ilkka Koskinen <ilkka@os.amperecomputing.com>
>> Sent: Wednesday, June 7, 2023 3:32 PM
>> To: Jonathan Corbet <corbet@lwn.net>; Will Deacon <will@kernel.org>; Mark
>> Rutland <mark.rutland@arm.com>; Besar Wicaksono
>> <bwicaksono@nvidia.com>; Suzuki K Poulose <suzuki.poulose@arm.com>;
>> Robin Murphy <robin.murphy@arm.com>
>> Cc: linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>> kernel@lists.infradead.org; Ilkka Koskinen <ilkka@os.amperecomputing.com>
>> Subject: [PATCH v3 1/4] perf: arm_cspmu: Split 64-bit write to 32-bit writes
>>
>> External email: Use caution opening links or attachments
>>
>>
>> Split the 64-bit register accesses if 64-bit access is not supported
>> by the PMU.
>>
>> Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
>> ---
>> drivers/perf/arm_cspmu/arm_cspmu.c | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c
>> b/drivers/perf/arm_cspmu/arm_cspmu.c
>> index a3f1c410b417..f8b4a149eb88 100644
>> --- a/drivers/perf/arm_cspmu/arm_cspmu.c
>> +++ b/drivers/perf/arm_cspmu/arm_cspmu.c
>> @@ -702,7 +702,10 @@ static void arm_cspmu_write_counter(struct
>> perf_event *event, u64 val)
>> if (use_64b_counter_reg(cspmu)) {
>> offset = counter_offset(sizeof(u64), event->hw.idx);
>>
>> - writeq(val, cspmu->base1 + offset);
>> + if (supports_64bit_atomics(cspmu))
>
> Looks good to me, but this function was recently replaced by
> arm_cspmu::has_atomic_dword. Please rebase the patch.
Sure, I do that.
Cheers, Ilkka
>
> Thanks,
> Besar
>
>> + writeq(val, cspmu->base1 + offset);
>> + else
>> + lo_hi_writeq(val, cspmu->base1 + offset);
>> } else {
>> offset = counter_offset(sizeof(u32), event->hw.idx);
>>
>> --
>> 2.40.1
>
>
next prev parent reply other threads:[~2023-06-21 19:06 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-07 8:31 [PATCH v3 0/4] perf: ampere: Add support for Ampere SoC PMUs Ilkka Koskinen
2023-06-07 8:31 ` [PATCH v3 1/4] perf: arm_cspmu: Split 64-bit write to 32-bit writes Ilkka Koskinen
2023-06-20 5:12 ` Besar Wicaksono
2023-06-21 19:05 ` Ilkka Koskinen [this message]
2023-06-07 8:31 ` [PATCH v3 2/4] perf: arm_cspmu: Support implementation specific filters Ilkka Koskinen
2023-06-20 5:39 ` Besar Wicaksono
2023-06-07 8:31 ` [PATCH v3 3/4] perf: arm_cspmu: Support implementation specific validation Ilkka Koskinen
2023-06-20 11:44 ` Robin Murphy
2023-06-21 22:09 ` Ilkka Koskinen
2023-06-07 8:31 ` [PATCH v3 4/4] perf: arm_cspmu: ampere_cspmu: Add support for Ampere SoC PMU Ilkka Koskinen
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