From: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
To: mail@andrewgigena.dev,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Robert Foss <rfoss@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bryan O'Donoghue <bod@kernel.org>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-media@vger.kernel.org
Subject: Re: [PATCH 2/4] dt-bindings: media: qcom,sm8150-camss: Add SM8150 CAMSS
Date: Thu, 5 Nov 2026 01:16:16 +0200 [thread overview]
Message-ID: <904675e8-701d-4fd6-b418-6c0dcc9288b9@linaro.org> (raw)
In-Reply-To: <20261104-sm8150-v7-4-rc1-camss-v1-2-7a9534a9a22f@andrewgigena.dev>
On 11/4/26 22:54, Andrew Gigena via B4 Relay wrote:
> From: Andrew Gigena <mail@andrewgigena.dev>
>
> Document the Qualcomm SM8150 Camera Subsystem. The IP integrates four
> CSIPHY, four CSID (two full and two lite), two VFE and two VFE-Lite
> instances, with 42 clocks, 12 interrupts, eight IOMMU streams, four
> interconnect paths and three power domains.
>
> SM8150 has a different register layout, clock tree and power domain
> topology from SM8250, so describe it in a dedicated schema instead of
> using qcom,sm8250-camss as a fallback.
>
> Signed-off-by: Andrew Gigena <mail@andrewgigena.dev>
> ---
> .../bindings/media/qcom,sm8150-camss.yaml | 477 +++++++++++++++++++++
> 1 file changed, 477 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,sm8150-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8150-camss.yaml
> new file mode 100644
> index 000000000000..a65067352b58
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,sm8150-camss.yaml
> @@ -0,0 +1,477 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/qcom,sm8150-camss.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SM8150 Camera Subsystem (CAMSS)
> +
> +maintainers:
> + - Andrew Gigena <mail@andrewgigena.dev>
> +
> +description: |
> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
> +
> +properties:
> + compatible:
> + const: qcom,sm8150-camss
> +
> + clocks:
> + minItems: 42
> + maxItems: 42
> +
> + clock-names:
> + items:
> + - const: camnoc_axi
> + - const: camnoc_axi_src
> + - const: cpas_ahb
> + - const: cphy_rx_src
> + - const: csiphy0
> + - const: csiphy0_timer
> + - const: csiphy0_timer_src
> + - const: csiphy1
> + - const: csiphy1_timer
> + - const: csiphy1_timer_src
> + - const: csiphy2
> + - const: csiphy2_timer
> + - const: csiphy2_timer_src
> + - const: csiphy3
> + - const: csiphy3_timer
> + - const: csiphy3_timer_src
Please switch to the new model of describing and exploiting
the stand-alone CSI2 PHY devices.
Any CAMSS drivers based on the legacy description of CSIPHYs
should not be accepted into the upstream.
--
Best wishes,
Vladimir
next prev parent reply other threads:[~2026-11-04 23:16 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 20:54 [PATCH 0/4] media: qcom: camss: Add SM8150 CAMSS support Andrew Gigena via B4 Relay
2026-11-04 20:54 ` [PATCH 1/4] dt-bindings: i2c: qcom-cci: Document SM8150 compatible Andrew Gigena via B4 Relay
2026-11-04 22:41 ` Bryan O'Donoghue
2026-11-04 23:12 ` Vladimir Zapolskiy
2026-11-04 20:54 ` [PATCH 2/4] dt-bindings: media: qcom,sm8150-camss: Add SM8150 CAMSS Andrew Gigena via B4 Relay
2026-11-04 22:44 ` Bryan O'Donoghue
2026-11-04 23:16 ` Vladimir Zapolskiy [this message]
2026-11-04 20:54 ` [PATCH 3/4] media: qcom: camss: Add support for SM8150 Andrew Gigena via B4 Relay
2026-11-04 21:19 ` Val Packett
2026-11-04 23:12 ` Andrew Gigena
2026-11-04 20:54 ` [PATCH 4/4] arm64: dts: qcom: sm8150: Add CAMSS and CCI nodes Andrew Gigena via B4 Relay
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