From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA2A520F063; Wed, 4 Jun 2025 11:37:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749037046; cv=none; b=W+WVekBfxm4fTxYVU0VKJVTzokDEnX4H+i9XINx/QBrtmXv8su2InRFFsKc4p0cGHmfMeYKyJqNzxOefJdlWBROPQtPhmMXzZfG6bM5n3AsOBkkWNWh5RIbztjE9mWFUhk3lcsA9oa0+VDzNPKb1TXbIy7x4DGkT5OBHGJh60Gs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749037046; c=relaxed/simple; bh=/03g7ApDlfWnALDbvW9C24ZKhfHyWDmZKHy+HvjP5Qk=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=d0c6VFgo7OpT6whP9TWjuzbk97lM/3aiX6nJiePM3RH2dO6b7mvwatzKRwbCWC0j9DW7ciikBMVSaElwycg1TXu+jMldwHKVrrsq6m3aXEDtnKxCRvm0JWb+JE9glNV/wMDHBOBmNP/cX5OJWOov1IRGc1jEYOxaend+jWm/gWw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qIoi8EPi; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qIoi8EPi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2A2A2C4CEE7; Wed, 4 Jun 2025 11:36:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749037046; bh=/03g7ApDlfWnALDbvW9C24ZKhfHyWDmZKHy+HvjP5Qk=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=qIoi8EPiVCeeIexPhQzxhsbNDeV5+YFZeBaPeV5UumRWr9GtbNhTLbr9C+wydFENz kx1Bk1bq4zm83ioW3wVCZbXsRa/AYyJkrpcbkofIxaV046FsBlVCVOjG5zwuKxrKWg Q5cnbbIsYHeuBgqgka3xaqIVpWszSXMkEPElqYHtNpWDN0oAqYRV2zQQqjHmC/Oinu gwQMU127tE9uAPWBsqyLdBF8+gmyjO691efkCoiH40kMf9V2xONBIvoYmeX0Y+ZlQp hul+qlP+DDye4hqg1yMLE80B0qUja2/ms3Y2DZROrh4Nuih5iF1v2mi6VgvT4PsDK6 4Ww672m79RfYg== Message-ID: <9089f618-0df1-4710-8158-36f58c94a0c6@kernel.org> Date: Wed, 4 Jun 2025 13:36:05 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document link_down reset To: Qiang Yu , Dmitry Baryshkov , Ziyue Zhang Cc: lpieralisi@kernel.org, kwilczynski@kernel.org, manivannan.sadhasivam@linaro.org, robh@kernel.org, bhelgaas@google.com, krzk+dt@kernel.org, neil.armstrong@linaro.org, abel.vesa@linaro.org, kw@linux.com, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org, konradybcio@kernel.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com References: <20250529035416.4159963-1-quic_ziyuzhan@quicinc.com> <20250529035416.4159963-3-quic_ziyuzhan@quicinc.com> <34dnpaz3gl5jctcohh5kbf4arijotpdlxn2eze3oixrausyev3@4qso3qg5zn4t> <43a6e141-adab-42e9-9966-ec54cb91a6de@quicinc.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 04/06/2025 12:05, Qiang Yu wrote: >>>>> Signed-off-by: Ziyue Zhang >>>>> --- >>>>> .../devicetree/bindings/pci/qcom,pcie-sa8775p.yaml | 13 +++++++++---- >>>>> 1 file changed, 9 insertions(+), 4 deletions(-) >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>> index e3fa232da2ca..805258cbcf2f 100644 >>>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>> @@ -61,11 +61,14 @@ properties: >>>>> - const: global >>>>> resets: >>>>> - maxItems: 1 >>>>> + minItems: 1 >>>>> + maxItems: 2 >>>> Shouldn't we just update this to maxItems:2 / minItems:2 and drop >>>> minItems:1 from the next clause? >>> Hi Dmitry, >>> >>> link_down reset is optional. In many other platforms, like sm8550 >>> and x1e80100, link_down reset is documented as a optional reset. >>> PCIe will works fine without link_down reset. So I think setting it >>> as optional is better. >> You are describing a hardware. How can a reset be optional in the >> _hardware_? It's either routed or not. > > I feel a bit confused. According to the theory above, everything seems to > be non-optional when describing hardware, such as registers, clocks, > resets, regulators, and interrupts—all of them either exist or do not. Can you construct a DTS being fully complete and correct picture of hardware without these? If not, they are not optional, because correct hardware representation would need them. > > Seems like I misunderstand the concept of 'optional'? Is 'optional' only > used for compatibility across different platforms? > > Additionally, we have documented the PCIe global interrupt as optional. I > was taught that, in the PCIe driver, this interrupt is retrieved using the > platform_get_irq_byname_optional API, so it can be documented as optional. > However, this still seems to contradict the theory mentioned earlier. ABI is just one side of the required properties. Best regards, Krzysztof