From: David Hildenbrand <david@redhat.com>
To: Xiao Wang <xiao.w.wang@intel.com>,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv/mm: Fix the comment for swap pte format
Date: Thu, 21 Sep 2023 16:21:17 +0200 [thread overview]
Message-ID: <90d76803-9e77-516d-83ac-99233cbd43f1@redhat.com> (raw)
In-Reply-To: <20230921141652.2657054-1-xiao.w.wang@intel.com>
On 21.09.23 16:16, Xiao Wang wrote:
> Swap type takes bits 7-11 and swap offset should start from bit 12.
>
> Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
> ---
> arch/riscv/include/asm/pgtable.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index e05b5dc1f0cb..e94a2998e81e 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -812,7 +812,7 @@ extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
> * bit 5: _PAGE_PROT_NONE (zero)
> * bit 6: exclusive marker
> * bits 7 to 11: swap type
> - * bits 11 to XLEN-1: swap offset
> + * bits 12 to XLEN-1: swap offset
> */
> #define __SWP_TYPE_SHIFT 7
> #define __SWP_TYPE_BITS 5
Reviewed-by: David Hildenbrand <david@redhat.com>
--
Cheers,
David / dhildenb
prev parent reply other threads:[~2023-09-21 21:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-21 14:16 Xiao Wang
2023-09-21 14:21 ` David Hildenbrand [this message]
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