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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id k3-20020a05640212c300b0041605b2d9c1sm603615edx.58.2022.03.04.07.01.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Mar 2022 07:01:37 -0800 (PST) Message-ID: <9113e319-58a2-fd90-6887-fb32eb21fd18@canonical.com> Date: Fri, 4 Mar 2022 16:01:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v2 1/2] dt-bindings:pwm:Add bindings doc for Sunplus SoC PWM Driver Content-Language: en-US To: Hammer Hsieh , thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, lee.jones@linaro.org, robh+dt@kernel.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: wells.lu@sunplus.com, hammer.hsieh@sunplus.com References: <1646374812-2988-1-git-send-email-hammerh0314@gmail.com> <1646374812-2988-2-git-send-email-hammerh0314@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <1646374812-2988-2-git-send-email-hammerh0314@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/03/2022 07:20, Hammer Hsieh wrote: > Add bindings doc for Sunplus SoC PWM Driver You miss spaces in the subject. > > Signed-off-by: Hammer Hsieh > --- > Changes in v2: > - Addressed all comments from Rob Herring. > modify author's mail match Signed-off-by. > - rebase kernel to 5.17 rc5 > > .../devicetree/bindings/pwm/pwm-sunplus.yaml | 40 ++++++++++++++++++++++ > MAINTAINERS | 5 +++ > 2 files changed, 45 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml b/Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml > new file mode 100644 > index 0000000..19fe5d5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml > @@ -0,0 +1,40 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) Sunplus Co., Ltd. 2021 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/pwm-sunplus.yaml# Is it going to be one binding for all Sunplus SoCs? Existing and future? > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sunplus SoC PWM Controller > + > +maintainers: > + - Hammer Hsieh > + allOf with pwm.yaml Then unevaluatedProperties instead of additionalProperties. > +properties: > + '#pwm-cells': > + const: 2 > + > + compatible: Commpatible goes first. Rest of properties you could order alphabetically. Similar approach in required. > + items: > + - const: sunplus,sp7021-pwm > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > +required: compatible > + - reg > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + pwm: pwm@9c007a00 { > + #pwm-cells = <2>; > + compatible = "sunplus,sp7021-pwm"; compatible goes first, then reg. Best regards, Krzysztof