From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B5E6271837; Wed, 12 Feb 2025 05:40:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739338824; cv=none; b=nLJndUEIZDXuZkzjnz3ZUhkIcQ/rkjrrqVn36pSQB1IuNN/63ZXoZQZ6eoh7gBtcs3tMY88iuxxrDPTMAFI5Jq+ru+/1DJpEXgzCDYjfEYwqoyX0oHjcST8RkuPnt9Pq3zSfLbbG/66lSmp54og/PgEukBivZGqqcaPfPsFdz9Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739338824; c=relaxed/simple; bh=KEhGUrXE1fCsrHtoX6tuVRiuAmt3qPnhL+sQJHMcJbY=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ODS7vDRljsyVve4QTUey0JxhB5nMRP59pcjf76GofW6idOS6TpIwNTw4p5v23gub9aOumyZ+YrH3Uoa46GcX5IGjKFos3oVbDLHMfK4lPH3GkSzmYRPb8DjgmZ7H9B6AS9IuGnrtF1QWcD28gZ0ReWbOrDHnDsVADNvkI/fA4Lg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=m1T1XwiE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="m1T1XwiE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A75B9C4CEDF; Wed, 12 Feb 2025 05:40:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739338824; bh=KEhGUrXE1fCsrHtoX6tuVRiuAmt3qPnhL+sQJHMcJbY=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=m1T1XwiE3mJ1Dl9M93DQxeJgCK+aRKaXbdNoC2gW3nC6pc9u7bOwo+tMKDEFBFf8y sVk8KYAzZjl3CI1TV4xAutadSkOO174jbZ3M84Bq3ygGH70sImlWzTmC5OvoVcLd0q z0sOocHYTY4H2GE4AEIacR2pWG6G1QSrHFbXecrazs/JC7R1DtKo83UHIDJbX/MgaS KHD5/DW/hKo0kvfm1XRohMc8XToQAAMgMyj4526aCZaKljpZIhPp48qzHjs0DqDZEs UeYzB9LheGzeWjnO+PFCF3TcnN0/r6ftamc2xetFuIMvcVAVVBBtFJRHqVDw1ZKkqJ oZcjhSqGe59lQ== Message-ID: <91428aa7-5b96-480d-8f0d-c742ed25f327@kernel.org> Date: Wed, 12 Feb 2025 06:40:14 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 03/12] dt-bindings: display: mediatek: add EXDMA yaml for MT8196 To: =?UTF-8?B?UGF1bC1wbCBDaGVuICjpmbPmn4/pnJYp?= , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "chunkuang.hu@kernel.org" , AngeloGioacchino Del Regno Cc: =?UTF-8?B?U3VubnkgU2hlbiAo5rKI5aeN5aeNKQ==?= , =?UTF-8?B?U2lyaXVzIFdhbmcgKOeOi+eak+aYsSk=?= , =?UTF-8?B?TmFuY3kgTGluICjmnpfmrKPonqIp?= , =?UTF-8?B?WGlhbmRvbmcgV2FuZyAo546L5YWI5YasKQ==?= , "linux-kernel@vger.kernel.org" , Project_Global_Chrome_Upstream_Group , "dri-devel@lists.freedesktop.org" , "linux-mediatek@lists.infradead.org" , =?UTF-8?B?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= , "devicetree@vger.kernel.org" , "fshao@chromium.org" , "p.zabel@pengutronix.de" , =?UTF-8?B?U2luZ28gQ2hhbmcgKOW8teiIiOWciyk=?= , "linux-arm-kernel@lists.infradead.org" , "matthias.bgg@gmail.com" , "treapking@chromium.org" References: <20250110123835.2719824-1-paul-pl.chen@mediatek.com> <20250110123835.2719824-4-paul-pl.chen@mediatek.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 11/02/2025 09:23, Paul-pl Chen (陳柏霖) wrote: > On Sat, 2025-01-18 at 09:37 +0100, Krzysztof Kozlowski wrote: >> >>> >>> (2)Primary Task of EXDMA: >>> The main function of EXDMA is to transfer buffers allocated by GEM >>> to >>> the subsequent display pipeline. >>> EXDMA serves as a bridge between memory allocated by GEM and the >>> display components, rather than acting as a general-purpose DMA >>> engine. >>> Based on the points above, we have decided to place the EXDMA >>> driver >>> under the DRM display subsystem rather than under the DMA >>> subsystem. >> >> >> I don't care if it uses GEM or kernel allocator or even 3rd party >> allocator. The question is: what is this device? If it is performing >> DMA, then it should be placed in "dma" directory. The rdma was placed >> differently but as you can easily check: it was never acked/reviewed, >> so >> don't use it as an example. >> >> Of course if it does not perform DMA, then it should not be in dma, >> but >> then I don't agree on using dma-cells here and anything like that in >> the >> driver. >> >> Best regards, >> Krzysztof >> >> >> > > Hi KK, > > Sorry, I just found this email was not send. > > This email is discuss about the EXDMA under the display subsystem > > The current placement of EXDMA under the display subsystem in > Mediatek's architecture is primarily due to its functional role as a > sub-device within the display pipeline. > > In MT8196 hardware design, the sub-devices in display pipeline follow a > sequence of: EXDMA -> BLENDER -> OUTPROC -> PQ -> DVO. > > In MT8195 hardware design, the sub-devices in display pipeline follow a > sequence of: OVL -> PQ ->DSI. > > As we see, OVL has been divided into three new hardware IPs in MT8196. > OVL and EXDMA both have the ability to fetch data directly from DRAM > and can be regarded as DMA controller. > > I also have confirmed with the hardware designer that EXDMA is a kind > of DMA, but it is specially designed to handle the graphical layer, and > has better performance than ordinary DMA. To me the decisive factor is that you use dma-cells here, so it is a DMA controller. DMA controllers should placed in a directory of their maintainer, so they can review it. > > Therefore, I think that moving EXDMA and OVL from the display folder to > the DMA folder, or only kepping them in the display folder is decided > by the two different views of DMA ability or display sub-device. > > We will follow your instructions to put EXDMA on the place you decided. > > > Best, Paul > Best regards, Krzysztof