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Thu, 6 Aug 2026 10:26:21 +0000 (GMT) Message-ID: <9153b101-583a-43ac-831a-6f4d78468b25@linux.ibm.com> Date: Thu, 6 Aug 2026 15:56:20 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] sched/fair: Prefer fully idle cores for NOHZ balancing To: Andrea Righi Cc: Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , K Prateek Nayak , Christian Loehle , Phil Auld , Mete Durlu , linux-kernel@vger.kernel.org, Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot References: <20260804151324.918020-1-arighi@nvidia.com> Content-Language: en-US From: Shrikanth Hegde In-Reply-To: <20260804151324.918020-1-arighi@nvidia.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=E6P9Y6dl c=1 sm=1 tr=0 ts=6a746154 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=VwQbUJbxAAAA:8 a=Ikd4Dj_1AAAA:8 a=KKAkSRfTAAAA:8 a=zd2uoN0lAAAA:8 a=VnNF1IyMAAAA:8 a=YoqClrWcZMqZyylXuUgA:9 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: Iff55zuh8bIZUDXgnumOMbaXdO4Msq1O X-Proofpoint-GUID: NALobT3op6iY1xACU6ExpyDpVno9Zao8 X-Proofpoint-Spam-Info: AW1haW4tMjYwODA2MDA4MCBTYWx0ZWRfX/JKZSe/9o0DT ejg1J7a3/WRDYxXHl9D7sb8mHxznX3FmDHB5xrTM6MYAw4jP1Gsh1SDKE6mLHJ0TyWSVR7P150B SKS4tnvBo6I6gq655lu2G+PwumdrwAo= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODA2MDA4MCBTYWx0ZWRfX5oYLbrKw6NUN BkmWzR1fFZNBTFBWy5bppSHs6irniXJBxa2V3jVR4xVZeB5YvUicoy/+Cb2J2xu3IwHrtRP+4UQ Q8pjMlvBuwYiSJndUWYbguWCcU7ykVE8KcgM78ye8sBWiFdU9dTC8DsSOSR+nFzT6fMwt3rd8X/ Dd4EgvM03FLpkH/v5tdgYETAaRvSnTTPEKcZvULBTubqy84x88Ezr+Dg7pVA6J5IjJPLT5qvTvK knuVNmidnjs+rmPpPCHwUIQIFERVDl9T7MM4uHwDP8IuYAaOWQcaTI73HQBMP6o11djz+UwCp94 fUi2Yd8LnCSa6BVIAMYjo96SnjVYPyGCO4G9P8UEKZkWVATwBNhyaQ+fYD29PhGAAKHyUQPsXfO Tqz1BIAidk6umi5t5D7LwDbNC/XNtLsvnUpdf9cRcpKj188HnjD3L0oz63qF/XIwZ1oCO5EPz5Z QaGKIXCxXwq8Cwgz+uw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-05_06,2026-08-05_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 suspectscore=0 adultscore=0 spamscore=0 malwarescore=0 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608060080 Hi Andrea, On 8/4/26 8:43 PM, Andrea Righi wrote: > find_new_ilb() selects the first idle housekeeping CPU without > considering whether another thread is running on the same physical core. > On an SMT system, the idle load balancer can therefore activate both > siblings even when another housekeeping CPU has an entirely idle core. > > On most SMT systems, this is not problematic because the idle load > balancer is a short-lived activity and the transient wakeup of a sibling > has negligible performance impact. > > However, this can be particularly costly on NVIDIA Olympus cores used in > Vera. Briefly activating an otherwise idle sibling can reduce the > performance available to the other sibling and this effect does not > necessarily end once the activated sibling becomes idle: after the ILB > finishes and its CPU enters WFI, full single-thread performance is > restored only after the sibling has remained idle for a qualification > interval (10 Ki cycles on the tested Vera system). Repeated short > sibling wakeups can therefore sustain the interference even with little > actual overlap. > > Prevent this by preferring an idle housekeeping CPU whose entire SMT > core is idle. Retain the first idle CPU as a fallback when no fully idle > core is available, so NOHZ balancing continues to make forward progress. > Once a partially busy core has been examined, skip its remaining SMT > siblings to avoid repeating the core-idle check on wide SMT systems. > > Tests performed using an ad hoc GEMM benchmark running one CPU-intensive > task per SMT core within its CPU affinity mask improved from > approximately 6.2 TFLOP/s to 9.4 TFLOP/s. > > Note that this preference may wake a fully idle physical core instead of > using an idle sibling of an active core, potentially increasing ILB > wakeup latency or energy consumption on some architectures. It may also > scan additional CPUs before selecting the one to run the ILB. The > selection falls back to the first idle CPU when no fully idle SMT core > is available. Non-SMT systems continue to select the first idle > housekeeping CPU. > > Cc: Vincent Guittot > Cc: K Prateek Nayak > Cc: Shrikanth Hegde > Signed-off-by: Andrea Righi > Reviewed-by: Mete Durlu > --- > Changes in v4: > - Remove redundant this_cpu check (Prateek Nayak, Vincent Guittot) > - Link to v3: https://lore.kernel.org/all/20260731191957.3199642-1-arighi@nvidia.com/ > > Changes in v3: > - After finding an idle fallback, skip all siblings when a busy CPU is > encountered, avoiding per-CPU traversal of known-busy cores (Mete Durlu) > - Link to v2: https://lore.kernel.org/all/20260729163225.1987068-1-arighi@nvidia.com/ > > Changes in v2: > - Avoid repeated is_core_idle() checks on wide SMT systems by pruning > the remaining siblings of a partially busy core (Prateek Nayak) > - Link to v1: https://lore.kernel.org/r/20260728214442.1648483-1-arighi@nvidia.com/ > > kernel/sched/fair.c | 55 ++++++++++++++++++++++++++++++++++++--------- > 1 file changed, 44 insertions(+), 11 deletions(-) > > diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c > index 37001c63452e5..9a975a684b487 100644 > --- a/kernel/sched/fair.c > +++ b/kernel/sched/fair.c > @@ -13964,29 +13964,62 @@ static inline int on_null_domain(struct rq *rq) > */ > static inline int find_new_ilb(void) > { > - int this_cpu = smp_processor_id(); > - const struct cpumask *hk_mask; > - int ilb_cpu; > + struct cpumask *ilb_cpus; > + int ilb_cpu, fallback = -1; > + > + lockdep_assert_irqs_disabled(); > + > + /* > + * Reuse the per-CPU select_rq_mask, which is protected from concurrent > + * use on this CPU by having interrupts disabled. > + */ > + ilb_cpus = this_cpu_cpumask_var_ptr(select_rq_mask); > + cpumask_and(ilb_cpus, nohz.idle_cpus_mask, > + housekeeping_cpumask(HK_TYPE_KERNEL_NOISE)); > + > + for_each_cpu(ilb_cpu, ilb_cpus) { > + if (!idle_cpu(ilb_cpu)) { > + /* > + * Once an idle fallback exists, a busy CPU proves that > + * this core cannot be fully idle. Skip its siblings. > + */ > + if (sched_smt_active() && fallback >= 0) > + cpumask_andnot(ilb_cpus, ilb_cpus, cpu_smt_mask(ilb_cpu)); > + continue; > + } > > - hk_mask = housekeeping_cpumask(HK_TYPE_KERNEL_NOISE); > + /* > + * Running the idle load balancer on an idle sibling of a busy > + * SMT core can reduce the capacity available to its sibling. Prefer > + * a CPU whose entire core is idle, but retain the first idle CPU as > + * a fallback so idle balancing can still make progress when no fully > + * idle core exists. > + */ > + if (sched_smt_active() && !is_core_idle(ilb_cpu)) { > + if (fallback < 0) > + fallback = ilb_cpu; > > - for_each_cpu_and(ilb_cpu, nohz.idle_cpus_mask, hk_mask) { > - if (ilb_cpu == this_cpu) > + /* > + * The core is not idle, so there is no need to check > + * any of its other SMT siblings. > + */ > + cpumask_andnot(ilb_cpus, ilb_cpus, > + cpu_smt_mask(ilb_cpu)); > continue; > + } > > - if (idle_cpu(ilb_cpu)) > - return ilb_cpu; > + return ilb_cpu; > } > > - return -1; > + return fallback; > } > > /* > * Kick a CPU to do the NOHZ balancing, if it is time for it, via a cross-CPU > * SMP function call (IPI). > * > - * We pick the first idle CPU in the HK_TYPE_KERNEL_NOISE housekeeping set > - * (if there is one). > + * Prefer a CPU on a fully idle core in the HK_TYPE_KERNEL_NOISE housekeeping > + * set. Fall back to the first idle CPU when no fully idle core exists. > */ > static void kick_ilb(unsigned int flags) > { I have only a small system at this moment. I don't see any noticeable regression/improvement in SMT4. FWIW, patch looks okay to me. Reviewed-by: Shrikanth Hegde BTW, Andrea, are you planning to do that refactoring of select_rq_mask or you want me to pick it up?