Re: [GIT PULL] arch/microblaze patches for 6.2-rc1

[Michal Simek <monstr@monstr.eu>]

On 12/12/22 18:49, Linus Torvalds wrote:
> On Thu, Dec 8, 2022 at 2:07 AM Michal Simek <monstr@monstr.eu> wrote:
>>
>> Microblaze patches for 6.2-rc1
>>
>> - Cleanup PCI support
> 
> That tag looks normal in the email, but it's actually nastily encoded.
> When I fetched it, I did this:
> 
>       git cat-file tag FETCH_HEAD | hexdump -c
> 
> and it shows
> 
> ...
> 0000080   9   3   5   4   6       +   0   1   0   0  \n  \n   M   i   c
> 0000090   r   o   b   l   a   z   e 302 240   p   a   t   c   h   e   s
> 00000a0 302 240   f   o   r 302 240   6   .   2   -   r   c   1  \n  \n
> 00000b0   -       C   l   e   a   n   u   p       P   C   I       s   u
> 00000c0   p   p   o   r   t  \n   -   -   -   -   -   B   E   G   I   N
> ...
> 
> Note how the "spaces" between "Microblaze", "patches", "for" and "6.2"
> are not actually regular space characters, but \xc2\a0, which is utf-8
> encoding for unicode character A0 ("no-break space").
> 
> Please don't do that.  I have my editor show odd characters as hex
> codes (I don't want any hidden information), which is why I noticed,
> and I'm not sure why/how you did it.

It is not done intentionally. I am looking at previous commit messages and I do 
c&p the first line from firefox via gitweb interface. This is style I use for 
years but I see when I do it now that there are added additional chars as you 
mentioned above.

I tracked it down that it started to behave like this between Oct 11/Nov 22 
(from my U-Boot tags) and it is actually firefox (which was upgraded) who is 
adding additional chars there. When I do the same style via chrome I can't see 
any issue.

I will start to write the whole message by hand without c&p to make sure that it 
won't happen again.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs