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From: "Nelson, Shannon" <shannon.nelson@amd.com>
To: Jason Gunthorpe <jgg@ziepe.ca>
Cc: alex.williamson@redhat.com, kevin.tian@intel.com,
	reinette.chatre@intel.com, tglx@linutronix.de,
	kvm@vger.kernel.org, brett.creeley@amd.com,
	linux-kernel@vger.kernel.org, Leon Romanovsky <leonro@nvidia.com>
Subject: Re: [PATCH vfio] vfio/pci: remove msi domain on msi disable
Date: Mon, 18 Sep 2023 17:13:50 -0700	[thread overview]
Message-ID: <91e0842c-1ba1-449d-b2d8-a3e2fc5ac95a@amd.com> (raw)
In-Reply-To: <20230918233219.GO13795@ziepe.ca>

On 9/18/2023 4:32 PM, Jason Gunthorpe wrote:
> 
> On Mon, Sep 18, 2023 at 10:48:54AM -0700, Nelson, Shannon wrote:
> 
>> In our case, the VF device's msix count value found in PCI config space is
>> changed by device configuration management outside of the baremetal host and
>> read by the QEMU instance when it starts up, and then read by the vfio PCI
>> core when QEMU requests the first IRQ.
> 
> Oh, you definitely can't do that!
> 
> PCI config space is not allowed to change outside the OS's view and we
> added sriov_set_msix_vec_count() specifically as a way to provide the
> necessary synchronization between all the parts.
> 
> Randomly changing, what should be immutable, parts of the config space
> from under a running OS is just non-compliant PCI behavior.

Hmmm... I guess I need to have a little chat with my friendly HW/FW folks.

Thanks,
sln





  reply	other threads:[~2023-09-19  0:14 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-14 19:14 Shannon Nelson
2023-09-18 14:17 ` Jason Gunthorpe
2023-09-18 17:48   ` Nelson, Shannon
2023-09-18 23:32     ` Jason Gunthorpe
2023-09-19  0:13       ` Nelson, Shannon [this message]
2023-09-18 18:43   ` Thomas Gleixner
2023-09-18 23:37     ` Jason Gunthorpe
2023-09-18 23:47       ` Thomas Gleixner
2023-09-19  0:02         ` Jason Gunthorpe
2023-09-19  0:25           ` Thomas Gleixner
2023-09-19  0:32             ` Jason Gunthorpe
2023-09-19  0:57               ` Thomas Gleixner

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