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Thu, 25 Sep 2025 05:36:50 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: AnQDLTKpvobg Date: Thu, 25 Sep 2025 11:35:44 +0200 From: "Arnd Bergmann" To: =?UTF-8?Q?Nuno_S=C3=A1?= , "Manikanta Guntupalli" , "Jorge Marques" , "Arnd Bergmann" Cc: "Alexandre Belloni" , "Jorge Marques" , "Wolfram Sang" , "Frank Li" , "linux-i3c@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "git (AMD-Xilinx)" , "Michal Simek" Message-Id: <91e73a29-96e3-4a52-addb-0cb954f46c04@app.fastmail.com> In-Reply-To: References: <20250924201837.3691486-1-arnd@kernel.org> <2wtpklapw5ogsevuvk2l4ngvw7hymer2y4cc454h47u2d7tq44@4mknmpk5yzil> <37d47af4f4d5220764efc5870630fdfc1e9be2c9.camel@gmail.com> Subject: Re: [PATCH] [v2] i3c: fix big-endian FIFO transfers Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Thu, Sep 25, 2025, at 10:58, Nuno S=C3=A1 wrote: > On Thu, 2025-09-25 at 08:47 +0000, Guntupalli, Manikanta wrote: >> > (AMD-Xilinx) ; Simek, Michal >> > Subject: Re: [PATCH] [v2] i3c: fix big-endian FIFO transfers >> > On Thu, 2025-09-25 at 07:37 +0000, Guntupalli, Manikanta wrote: >> > > > i3c@lists.infradead.org; linux-kernel@vger.kernel.org >> > > > Subject: Re: [PATCH] [v2] i3c: fix big-endian FIFO transfers >> > > > On Wed, Sep 24, 2025 at 10:18:33PM +0200, Arnd Bergmann wrote: >> >=20 >> > I would argue that's something for callers of these functions to ca= re about. >> If each I3C driver has to handle FIFO endianness individually, it int= roduces >> unnecessary duplication and overhead across drivers. Centralizing thi= s in the >> FIFO access helpers keeps the logic consistent, avoids repeated boile= rplate, >> and reduces the chance of subtle bugs. > > I mean, that's what spi and i2c drivers do already.=C2=A0With enum i3c= _fifo_endian > you're already forcing users to care (or know) about endianism so they= might as > well just pass the data in the proper order already (not sure if it's = such a big > 'burden'). Can you give an example of an spi or i2c driver handles a similar situation to the new i3c driver? As far as I can tell, swapping the bytes in a FIFO register is very unusual for a hardware design and probably a mistake rather than an intentional decision. On the other hand, I can find drivers that are obviously wrong on big-endian kernels, such as Tegra's i2c_writesl_vi() function being unintentionally swapped from i2c_writesl() on big-endian. For the i3c helper, I think Jorge's current version with my fix should work for every normal driver, and I would not want to make it more complicated for an obscure case. The version for the AMD driver can just be in that driver, or it could be a separate function name in the common header if there is a chance we'll need it again. Arnd