mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzk@kernel.org>
To: patrice.chotard@foss.st.com, Mark Brown <broonie@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>
Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, christophe.kerello@foss.st.com
Subject: Re: [PATCH 3/9] dt-bindings: misc: Add STM32 Octo Memory Manager controller
Date: Wed, 22 Jan 2025 16:22:43 +0100	[thread overview]
Message-ID: <920a7917-e7ba-4380-8401-2de318e60b74@kernel.org> (raw)
In-Reply-To: <20250122141037.953934-4-patrice.chotard@foss.st.com>

On 22/01/2025 15:10, patrice.chotard@foss.st.com wrote:
> From: Patrice Chotard <patrice.chotard@foss.st.com>
> 
> Add bindings for STM32 Octo Memory Manager (OMM) controller.
> 
> OMM manages:
>   - the muxing between 2 OSPI busses and 2 output ports.
>     There are 4 possible muxing configurations:
>       - direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2
>         output is on port 2
>       - OSPI1 and OSPI2 are multiplexed over the same output port 1
>       - swapped mode (no multiplexing), OSPI1 output is on port 2,
>         OSPI2 output is on port 1
>       - OSPI1 and OSPI2 are multiplexed over the same output port 2
>   - the split of the memory area shared between the 2 OSPI instances.
>   - chip select selection override.
>   - the time between 2 transactions in multiplexed mode.
> 
> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
> ---
>  .../bindings/misc/st,stm32-omm.yaml           | 194 ++++++++++++++++++
>  1 file changed, 194 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/misc/st,stm32-omm.yaml


All my other comments apply.

Also:
This cannot be misc. Depending what this is, either dedicated subsystem
like memory or soc.


> 
> diff --git a/Documentation/devicetree/bindings/misc/st,stm32-omm.yaml b/Documentation/devicetree/bindings/misc/st,stm32-omm.yaml
> new file mode 100644
> index 000000000000..ef8f5d2c526c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/misc/st,stm32-omm.yaml


> @@ -0,0 +1,194 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/misc/st,stm32-omm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: STM32 Octo Memory Manager (OMM)
> +
> +maintainers:
> +  - Patrice Chotard <patrice.chotard@foss.st.com>
> +
> +description: |
> +  The STM32 Octo Memory Manager is a low-level interface that enables an
> +  efficient OCTOSPI pin assignment with a full I/O matrix (before alternate
> +  function map) and multiplex of single/dual/quad/octal SPI interfaces over
> +  the same bus. It Supports up to:
> +    - Two single/dual/quad/octal SPI interfaces
> +    - Two ports for pin assignment
> +
> +properties:
> +  compatible:
> +    const: st,stm32mp25-omm
> +
> +  "#address-cells":
> +    const: 2
> +
> +  "#size-cells":
> +    const: 1
> +
> +  ranges:
> +    description: |
> +      Reflects the memory layout with four integer values per OSPI instance.
> +      Format:
> +      <chip-select> 0 <registers base address> <size>
> +
> +  reg:
> +    items:
> +      - description: registers

Well, why here is entirely different syntax? Anyway, useless
description. Say something useful

> +      - description: memory mapping

This is a bit better but still confusing. Memory mapping of what?
Virtual memory? This is vague to me.

> +
> +  reg-names:
> +    items:
> +      - const: omm
> +      - const: omm_mm

Not useful names. Drop prefixes and then you end up with empty first
entry :/

> +
> +  memory-region:
> +    description: Phandle to a node describing memory-map region to be used.

Constraints.

> +
> +  memory-region-names:
> +    minItems: 1

Nope, you just said one phandle?

> +    items:
> +      - const: mm_ospi1
> +      - const: mm_ospi2

Drop redundant parts. If name is just 1 or 2, then just drop xxx-names

> +
> +  clocks:
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +  access-controllers:
> +    minItems: 1
> +    maxItems: 2
> +
> +  st,syscfg-amcr:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description: |
> +      The Address Mapping Control Register (AMCR) is used to split the 256MB
> +      memory map area shared between the 2 OSPI instance. The Octo Memory
> +      Manager sets the AMCR depending of the memory-region configuration.
> +      Format is phandle to syscfg / register offset within syscfg / memory split
> +      bitmask.
> +      The memory split bitmask description is:
> +        - 000: OCTOSPI1 (256 Mbytes), OCTOSPI2 unmapped
> +        - 001: OCTOSPI1 (192 Mbytes), OCTOSPI2 (64 Mbytes)
> +        - 010: OCTOSPI1 (128 Mbytes), OCTOSPI2 (128 Mbytes)
> +        - 011: OCTOSPI1 (64 Mbytes), OCTOSPI2 (192 Mbytes)
> +        - 1xx: OCTOSPI1 unmapped, OCTOSPI2 (256 Mbytes)
> +    items:
> +      minItems: 3
> +      maxItems: 3
> +
> +  st,omm-req2ack-ns:
> +    description: |
> +      In multiplexed mode (MUXEN = 1), this field defines the time in
> +      nanoseconds between two transactions.
> +
> +  st,omm-cssel-ovr:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: |
> +      Configure the chip select selector override for the 2 OCTOSPIs.
> +      The 2 bits mask muxing description is:
> +        -bit 0: Chip select selector override setting for OCTOSPI1
> +          0x0: the chip select signal from OCTOSPI1 is sent to NCS1
> +          0x1: the chip select signal from OCTOSPI1 is sent to NCS2
> +        -bit 1: Chip select selector override setting for OCTOSPI2
> +          0x0: the chip select signal from OCTOSPI2 is sent to NCS1
> +          0x1: the chip select signal from OCTOSPI2 is sent to NCS2
> +
> +  st,omm-mux:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: |
> +      Configure the muxing between the 2 OCTOSPIs busses and the 2 output ports.
> +      The muxing 2 bits mask description is:
> +        - 0x0: direct mode, default
> +        - 0x1: mux OCTOSPI1 and OCTOSPI2 to port 1
> +        - 0x2: swapped mode
> +        - 0x3: mux OCTOSPI1 and OCTOSPI2 to port 2
> +
> +  power-domains:
> +    maxItems: 1
> +
> +patternProperties:
> +  "^spi@[a-f0-9]+$":
> +    type: object
> +    $ref: "/schemas/spi/st,stm32-ospi.yaml#"

Drop quotes.

Look at your other $ref and keep things consistent.

Best regards,
Krzysztof

  reply	other threads:[~2025-01-22 15:22 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-22 14:10 [PATCH 0/9] Add STM32MP25 SPI NOR support patrice.chotard
2025-01-22 14:10 ` [PATCH 1/9] dt-bindings: spi: Add STM32 OSPI controller patrice.chotard
2025-01-22 15:18   ` Krzysztof Kozlowski
2025-01-24 15:53     ` Patrice CHOTARD
2025-01-22 14:10 ` [PATCH 2/9] spi: stm32: Add OSPI driver patrice.chotard
2025-01-22 14:10 ` [PATCH 3/9] dt-bindings: misc: Add STM32 Octo Memory Manager controller patrice.chotard
2025-01-22 15:22   ` Krzysztof Kozlowski [this message]
2025-01-24 15:53     ` Patrice CHOTARD
2025-01-22 14:10 ` [PATCH 4/9] misc: Add STM32 Octo Memory Manager driver patrice.chotard
2025-01-22 14:10 ` [PATCH 5/9] arm64: dts: st: Add OMM node on stm32mp251 patrice.chotard
2025-01-22 14:10 ` [PATCH 6/9] arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi patrice.chotard
2025-01-22 14:10 ` [PATCH 7/9] arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board patrice.chotard
2025-01-22 14:10 ` [PATCH 8/9] arm64: defconfig: Enable STM32 Octo Memory Manager driver patrice.chotard
2025-01-22 15:23   ` Krzysztof Kozlowski
2025-01-24 15:53     ` Patrice CHOTARD
2025-01-22 14:10 ` [PATCH 9/9] arm64: defconfig: Enable STM32 OctoSPI driver patrice.chotard

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=920a7917-e7ba-4380-8401-2de318e60b74@kernel.org \
    --to=krzk@kernel.org \
    --cc=alexandre.torgue@foss.st.com \
    --cc=arnd@arndb.de \
    --cc=broonie@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=christophe.kerello@foss.st.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=linux-stm32@st-md-mailman.stormreply.com \
    --cc=mcoquelin.stm32@gmail.com \
    --cc=p.zabel@pengutronix.de \
    --cc=patrice.chotard@foss.st.com \
    --cc=robh@kernel.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®