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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c1e7bd6242fsm10277275a12.22.2025.12.22.18.12.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 22 Dec 2025 18:12:30 -0800 (PST) Message-ID: <9249de66-89de-4365-a821-3ca8718b38e4@oss.qualcomm.com> Date: Tue, 23 Dec 2025 10:12:26 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register To: Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Tingwei Zhang Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tao Zhang References: <20251222-add_sysfs_nodes_to_configure_tpda-v6-0-b27143d45c86@oss.qualcomm.com> <20251222-add_sysfs_nodes_to_configure_tpda-v6-3-b27143d45c86@oss.qualcomm.com> <684e06d2-1d90-4b89-96d8-7458f79e3cc9@arm.com> Content-Language: en-US From: Jie Gan In-Reply-To: <684e06d2-1d90-4b89-96d8-7458f79e3cc9@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: VuwQ-3hE1PCks-YBP68dhxUrW-nzuytw X-Proofpoint-GUID: VuwQ-3hE1PCks-YBP68dhxUrW-nzuytw X-Authority-Analysis: v=2.4 cv=asi/yCZV c=1 sm=1 tr=0 ts=6949fa90 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=8-9xBe79CkFr4NHhixMA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjIzMDAxNiBTYWx0ZWRfX8zWmMeFgPeDF rK7hUVmtp81CMslQqjakhCmJSkzYbtRBO2q8V9NM49pG27HGM3f68ZsZwyg7s8JgMrLkIgmY6ni VzlVviny68nJBYls4lakKjH/Lm9zeA3u6WdMyuaGC0htx5zwW1xKP8JVS5AtumAGlOwVFSJwkkU OIqBARJ/zVJNJuFwnV/0VRUBGjDI8H4KR8aiv0jYerpGVLBofeBGbKqM28+86Zda22our4w0UNn NCpC8iYx1ooDg3jEFM5kfjj+TvQbW1hCRvjNgSjWw52MdFzTjQr8y7ifWqyrjM5V+YY/iwaoI1/ iwfnPLGG/1mCaE14IL2cIBut//mFipme9Or/cBSypxwoLUtN7mem1K3Pl9qsbCeEIdygiR3dYg0 tdq9lYfuxfykmM2q7f+kMKdG3YhQUzZ3GGlm5rbCaoOmAyw6KFKjwLGUYjtAuqTjzzT1mMj90XL j3FF3JiYL/oWxkLfDaQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-22_04,2025-12-22_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 malwarescore=0 adultscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512230016 On 12/22/2025 9:10 PM, Suzuki K Poulose wrote: > On 22/12/2025 06:02, Jie Gan wrote: >> From: Tao Zhang >> >> The TPDA_SYNC counter tracks the number of bytes transferred from the >> aggregator. When this count reaches the value programmed in the >> TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace >> tools to accurately parse each valid packet. >> >> Signed-off-by: Tao Zhang >> Reviewed-by: James Clark >> Co-developed-by: Jie Gan >> Signed-off-by: Jie Gan >> --- >>   .../ABI/testing/sysfs-bus-coresight-devices-tpda   | 10 +++++ >>   drivers/hwtracing/coresight/coresight-tpda.c       | 46 ++++++++++++ >> ++++++++++ >>   drivers/hwtracing/coresight/coresight-tpda.h       |  8 ++++ >>   3 files changed, 64 insertions(+) >> >> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices- >> tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda >> index c8bc7b19ab25..d359d90dca72 100644 >> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda >> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda >> @@ -41,3 +41,13 @@ Contact:    Jinlong Mao >> , Tao Zhang >   Description: >>           (RW) Set global (all ports) flush request bit. The bit >> remains set until a >>           global flush request sequence completes. >> + >> +What:        /sys/bus/coresight/devices//syncr_mode >> +Date:        December 2025 >> +KernelVersion:    6.19 >> +Contact:    Jinlong Mao , Tao Zhang >> , Jie Gan >> +Description: >> +        (RW) Set mode the of the syncr counter. >> +        mode 0 - COUNT[11:0] value represents the approximate number >> of bytes moved between two ASYNC packet requests >> +        mode 1 - the bits COUNT[11:7] are used as a power of 2. for >> example, we could insert an async packet every 8K >> +                 data by writing a value 13 to the COUNT[11:7] field. > > What is COUNT here ? and more importantly how is this usefule without > the support for setting the COUNT ? Do we plan to expose setting this ? > If yes, why not now ? I don't see the point of merging "this" patch > without the support for setting the counter. During enable_pre_port, COUNT is configured to its maximum value. This counter tracks packets received by TPDA and inserts an async packet once the specified value is reached. I will add the sysfs node for COUNT. I didnt add it because we typically didnt modify the value of the COUNT, but it's better to have a node for setting the value when needed. Thanks, Jie > > Suzuki > > > >> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/ >> hwtracing/coresight/coresight-tpda.c >> index d24a9098f1b1..7baa8a0965d3 100644 >> --- a/drivers/hwtracing/coresight/coresight-tpda.c >> +++ b/drivers/hwtracing/coresight/coresight-tpda.c >> @@ -163,6 +163,15 @@ static void tpda_enable_pre_port(struct >> tpda_drvdata *drvdata) >>        */ >>       if (drvdata->trig_flag_ts) >>           writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); >> + >> +    /* Initialize with a value of 0 */ >> +    val = 0; >> +    if (drvdata->syncr_mode) >> +        val |= TPDA_SYNCR_MODE_CTRL_MASK; >> + >> +    /* Program the counter to its MAX value by default */ >> +    val |= TPDA_SYNCR_COUNTER_MASK; >> +    writel_relaxed(val, drvdata->base + TPDA_SYNCR); >>   } >>   static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) >> @@ -385,8 +394,45 @@ static ssize_t global_flush_req_store(struct >> device *dev, >>   } >>   static DEVICE_ATTR_RW(global_flush_req); >> +static ssize_t syncr_mode_show(struct device *dev, >> +                   struct device_attribute *attr, >> +                   char *buf) >> +{ >> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >> +    unsigned long val, syncr_val; >> + >> +    if (!drvdata->csdev->refcnt) >> +        return -EINVAL; >> + >> +    guard(spinlock)(&drvdata->spinlock); >> +    syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR); >> +    val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val); >> + >> +    return sysfs_emit(buf, "%lu\n", val); >> +} >> + >> +static ssize_t syncr_mode_store(struct device *dev, >> +                struct device_attribute *attr, >> +                const char *buf, >> +                size_t size) >> +{ >> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >> +    unsigned long val; >> + >> +    if (kstrtoul(buf, 0, &val)) >> +        return -EINVAL; >> + >> +    guard(spinlock)(&drvdata->spinlock); >> +    /* set the mode when first enabling the device */ >> +    drvdata->syncr_mode = !!val; >> + >> +    return size; >> +} >> +static DEVICE_ATTR_RW(syncr_mode); >> + >>   static struct attribute *tpda_attrs[] = { >>       &dev_attr_global_flush_req.attr, >> +    &dev_attr_syncr_mode.attr, >>       tpda_trig_sysfs_rw(freq_ts_enable, FREQTS), >>       tpda_trig_sysfs_rw(trig_freq_enable, FRIE), >>       tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE), >> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/ >> hwtracing/coresight/coresight-tpda.h >> index 1cc9253293ec..1d2de50bb9f9 100644 >> --- a/drivers/hwtracing/coresight/coresight-tpda.h >> +++ b/drivers/hwtracing/coresight/coresight-tpda.h >> @@ -9,6 +9,7 @@ >>   #define TPDA_CR            (0x000) >>   #define TPDA_Pn_CR(n)        (0x004 + (n * 4)) >>   #define TPDA_FPID_CR        (0x084) >> +#define TPDA_SYNCR        (0x08C) >>   /* Cross trigger global (all ports) flush request bit */ >>   #define TPDA_CR_FLREQ        BIT(0) >> @@ -36,6 +37,11 @@ >>   /* Aggregator port DSB data set element size bit */ >>   #define TPDA_Pn_CR_DSBSIZE        BIT(8) >> +/* TPDA_SYNCR counter mask */ >> +#define TPDA_SYNCR_COUNTER_MASK        GENMASK(11, 0) >> +/* TPDA_SYNCR mode control bit */ >> +#define TPDA_SYNCR_MODE_CTRL_MASK    GENMASK(12, 12) >> + >>   #define TPDA_MAX_INPORTS    32 >>   /** >> @@ -52,6 +58,7 @@ >>    * @trig_freq:    Enable/disable cross trigger FREQ packet request >> interface. >>    * @freq_ts:    Enable/disable the timestamp for all FREQ packets. >>    * @cmbchan_mode: Configure the CMB/MCMB channel mode. >> + * @syncr_mode:    Configure the mode for counting packets. >>    */ >>   struct tpda_drvdata { >>       void __iomem        *base; >> @@ -66,6 +73,7 @@ struct tpda_drvdata { >>       bool            trig_freq; >>       bool            freq_ts; >>       bool            cmbchan_mode; >> +    bool            syncr_mode; >>   }; >>   /* Enumerate members of global control register(cr) */ >> >