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Wed, 10 Dec 2025 16:42:13 -0800 (PST) X-Google-Smtp-Source: AGHT+IEzVnt7zdOJV4tIVUdTd0Iljd79rdgfszDHAS9d7dWKHGfcheesKUfZDrWbLlhNo657TfxRfQ== X-Received: by 2002:a17:90b:1d04:b0:32b:9506:1780 with SMTP id 98e67ed59e1d1-34a7281a37emr4182413a91.9.1765413733189; Wed, 10 Dec 2025 16:42:13 -0800 (PST) Received: from [192.168.29.63] ([49.43.227.137]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c0cd2880d96sm102560a12.2.2025.12.10.16.42.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Dec 2025 16:42:12 -0800 (PST) Message-ID: <925c7431-823c-45e7-b446-ac1ed98eadd5@oss.qualcomm.com> Date: Thu, 11 Dec 2025 06:12:06 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 2/2] PCI: Add support for PCIe WAKE# interrupt To: Bjorn Helgaas Cc: Greg Kroah-Hartman , Pavel Machek , linux-pm@vger.kernel.org, "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, Danilo Krummrich , Bartosz Golaszewski , Linus Walleij , linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, quic_vbadigan@quicinc.com, quic_mrana@quicinc.com, sherry.sun@nxp.com, Len Brown References: <20251127-wakeirq_support-v6-0-60f581f94205@oss.qualcomm.com> <20251127-wakeirq_support-v6-2-60f581f94205@oss.qualcomm.com> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: <20251127-wakeirq_support-v6-2-60f581f94205@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: iO9OJp0AukRDkmx4v7wxlapmrXjd5mMK X-Authority-Analysis: v=2.4 cv=KqBAGGWN c=1 sm=1 tr=0 ts=693a1366 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fqkWdzeoxvaQSXQQJMpBPw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=NEAV23lmAAAA:8 a=KKAkSRfTAAAA:8 a=BO740POU_6FGrjW6UNEA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: iO9OJp0AukRDkmx4v7wxlapmrXjd5mMK X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjExMDAwNCBTYWx0ZWRfX/9WTe+LdRnLX 91UN/B/ftPH/7daEZs/9ghgNKU2ZpLr4r0aAUAs5SNp9ceIQDu72TwqV/IUDOssx4JH7Rvf9OpY POxl8irkqJYrsa7qcUA7mK/vE6aliBN8dJ3afYqUnb/CsW+Uo0Vu2ucD4hn/ZzXUrf5Zoyy2Apj 9WpHbzUM7NjDjAnzPD19T/SqHKP9KWlnmI3LnL33GfdESyEdQRx9W+hKjhmLzJvBstbW81kCKgB tzShFdDTTfGJuvvDNz/BwLnCOtyi3jcrnnPHed1JwHFJB1E+rSJ89XW+gTR4qKefciI/DGgEieH +dSesD+ri3W+lpXdlDK656v4nkX1bbUK7XNJf0mbudn2yAeCp4auL6PkXJzYLz5JR0tIiL+5Z3f L9yABZ/MsFUXNJbxEg2oP/z7/8nQhg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-10_03,2025-12-09_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 phishscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512110004 Hi Bjorn, Can you review this patch? - Krishna Chaitanya. On 11/27/2025 6:15 PM, Krishna Chaitanya Chundru wrote: > According to the PCIe specification 6, sec 5.3.3.2, there are two defined > wakeup mechanisms: Beacon and WAKE# for the Link wakeup mechanisms to > provide a means of signaling the platform to re-establish power and > reference clocks to the components within its domain. Beacon is a hardware > mechanism invisible to software (PCIe r7.0, sec 4.2.7.8.1). Adding WAKE# > support in PCI framework. > > According to the PCIe specification, multiple WAKE# signals can exist in > a system. In configurations involving a PCIe switch, each downstream port > (DSP) of the switch may be connected to a separate WAKE# line, allowing > each endpoint to signal WAKE# independently. From figure 5.4, WAKE# can > also be terminated at the switch itself. To support this, the WAKE# > should be described in the device tree node of the endpint/bridge. If all > endpoints share a single WAKE# line, then WAKE# should be defined in the > each node. > > To support legacy devicetree in direct attach case, driver will search > in root port node for WAKE# if the driver doesn't find in the endpoint > node. > > In pci_device_add(), PCI framework will search for the WAKE# in its node, > If not found, it searches in its upstream port only if upstream port is > root port to support legacy bindings. Once found, register for the wake IRQ > in shared mode, as the WAKE# may be shared among multiple endpoints. > > When the IRQ is asserted, the handle_threaded_wake_irq() handler triggers > a pm_runtime_resume(). The PM framework ensures that the parent device is > resumed before the child i.e controller driver which can bring back device > state to D0. > > WAKE# is added in dts schema and merged based on below links. > > Link: https://lore.kernel.org/all/20250515090517.3506772-1-krishna.chundru@oss.qualcomm.com/ > Link: https://github.com/devicetree-org/dt-schema/pull/170 > Reviewed-by: Linus Walleij > Signed-off-by: Krishna Chaitanya Chundru > --- > drivers/pci/of.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++++ > drivers/pci/pci.h | 6 ++++++ > drivers/pci/probe.c | 2 ++ > drivers/pci/remove.c | 1 + > include/linux/pci.h | 2 ++ > 5 files changed, 69 insertions(+) > > diff --git a/drivers/pci/of.c b/drivers/pci/of.c > index 3579265f119845637e163d9051437c89662762f8..fc33405a7b1f001e171277434663cc9dfe57c69b 100644 > --- a/drivers/pci/of.c > +++ b/drivers/pci/of.c > @@ -7,6 +7,7 @@ > #define pr_fmt(fmt) "PCI: OF: " fmt > > #include > +#include > #include > #include > #include > @@ -15,6 +16,7 @@ > #include > #include > #include > +#include > #include "pci.h" > > #ifdef CONFIG_PCI > @@ -586,6 +588,62 @@ int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin) > return irq_create_of_mapping(&oirq); > } > EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci); > + > +static void pci_configure_wake_irq(struct pci_dev *pdev, struct gpio_desc *wake) > +{ > + int ret, wake_irq; > + > + if (!wake) > + return; > + > + wake_irq = gpiod_to_irq(wake); > + if (wake_irq < 0) { > + dev_err(&pdev->dev, "Failed to get wake irq: %d\n", wake_irq); > + return; > + } > + > + device_init_wakeup(&pdev->dev, true); > + > + ret = dev_pm_set_dedicated_shared_wake_irq(&pdev->dev, wake_irq, > + IRQ_TYPE_EDGE_FALLING); > + if (ret < 0) { > + dev_err(&pdev->dev, "Failed to set wake IRQ: %d\n", ret); > + device_init_wakeup(&pdev->dev, false); > + } > +} > + > +void pci_configure_of_wake_gpio(struct pci_dev *dev) > +{ > + struct device_node *dn = pci_device_to_OF_node(dev); > + struct gpio_desc *gpio; > + struct pci_dev *root; > + > + if (!dn) > + return; > + > + gpio = fwnode_gpiod_get_index(of_fwnode_handle(dn), > + "wake", 0, GPIOD_IN | GPIOD_FLAGS_BIT_NONEXCLUSIVE, NULL); > + if (IS_ERR(gpio)) { > + /* > + * To support legacy devicetree, search in root port for WAKE# > + * in direct attach case. > + */ > + root = pci_upstream_bridge(dev); > + if (pci_is_root_bus(root->bus)) > + pci_configure_wake_irq(dev, root->wake); > + } else { > + dev->wake = gpio; > + pci_configure_wake_irq(dev, gpio); > + } > +} > + > +void pci_remove_of_wake_gpio(struct pci_dev *dev) > +{ > + dev_pm_clear_wake_irq(&dev->dev); > + device_init_wakeup(&dev->dev, false); > + gpiod_put(dev->wake); > + dev->wake = NULL; > +} > #endif /* CONFIG_OF_IRQ */ > > static int pci_parse_request_of_pci_ranges(struct device *dev, > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h > index 4492b809094b5794bd94dfbc20102cb208c3fa2f..05cb240ecdb59f9833ca6dae2357fdbd012195d6 100644 > --- a/drivers/pci/pci.h > +++ b/drivers/pci/pci.h > @@ -1056,6 +1056,9 @@ void pci_release_of_node(struct pci_dev *dev); > void pci_set_bus_of_node(struct pci_bus *bus); > void pci_release_bus_of_node(struct pci_bus *bus); > > +void pci_configure_of_wake_gpio(struct pci_dev *dev); > +void pci_remove_of_wake_gpio(struct pci_dev *dev); > + > int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge); > bool of_pci_supply_present(struct device_node *np); > int of_pci_get_equalization_presets(struct device *dev, > @@ -1101,6 +1104,9 @@ static inline int devm_of_pci_bridge_init(struct device *dev, struct pci_host_br > return 0; > } > > +static inline void pci_configure_of_wake_gpio(struct pci_dev *dev) { } > +static inline void pci_remove_of_wake_gpio(struct pci_dev *dev) { } > + > static inline bool of_pci_supply_present(struct device_node *np) > { > return false; > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c > index 0ce98e18b5a876afe72af35a9f4a44d598e8d500..f9b879c8e3f72a9845f60577335019aa2002dc23 100644 > --- a/drivers/pci/probe.c > +++ b/drivers/pci/probe.c > @@ -2762,6 +2762,8 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus) > ret = device_add(&dev->dev); > WARN_ON(ret < 0); > > + pci_configure_of_wake_gpio(dev); > + > pci_npem_create(dev); > > pci_doe_sysfs_init(dev); > diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c > index ce5c25adef5518e5aec30c41de37ea66d682f3b0..26e9c1df51c76344a1d7f5cc7edd433780e73474 100644 > --- a/drivers/pci/remove.c > +++ b/drivers/pci/remove.c > @@ -54,6 +54,7 @@ static void pci_destroy_dev(struct pci_dev *dev) > if (pci_dev_test_and_set_removed(dev)) > return; > > + pci_remove_of_wake_gpio(dev); > pci_doe_sysfs_teardown(dev); > pci_npem_remove(dev); > > diff --git a/include/linux/pci.h b/include/linux/pci.h > index d1fdf81fbe1e427aecbc951fa3fdf65c20450b05..cd7b5eb82a430ead2f64d903a24a5b06a1b7b17e 100644 > --- a/include/linux/pci.h > +++ b/include/linux/pci.h > @@ -555,6 +555,8 @@ struct pci_dev { > /* These methods index pci_reset_fn_methods[] */ > u8 reset_methods[PCI_NUM_RESET_METHODS]; /* In priority order */ > > + struct gpio_desc *wake; /* Holds WAKE# gpio */ > + > #ifdef CONFIG_PCIE_TPH > u16 tph_cap; /* TPH capability offset */ > u8 tph_mode; /* TPH mode */ >