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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=NOPYOk6g c=1 sm=1 tr=0 ts=69c5933b cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=vQjnIgnGPh3RF3IfkbUA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-ORIG-GUID: Xl7xesDXLe9jYeRRDwJk8wDl5zgsISxE X-Proofpoint-GUID: Xl7xesDXLe9jYeRRDwJk8wDl5zgsISxE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI2MDE0NSBTYWx0ZWRfX3bqCYspQUTm7 o1KRcB9KzfYmHlhBCifG1DJK79Y4rskGq0qnEekH04hF5I98NMx14NbTA53s1/jT2hl6CGuRWtv LQZLjycfJ+OYDLRNwnTTXohKwN9MsjXXBDUm4qz3G8ZGXdd8RjDUpvTGZWtp+VjbvAFgX4NGYyv PmRAwhLF/6+XKZEwNLhpym1lw1EKn4ekG/aEVOP6zriWZf4pCLmPXBz8H8LD+/xI3qtxFuTKAE1 +W9gngUs8cKxzikOS/vjkAWqcI44FIc8o5BCCHEcvRgld+AVV92jgEIq8XfNZ/FmXw65V98LCPK iLJyA/ULiS8Dd6xE05UanMbuiZWqWpeCG6RwxVL+WA6tqGXpnzB2m04fCn7mAyBPBYjdjPHaDLf dOishb93/VZoScnwudlK8e3GzCrpdClYy4sTdMBy7YCzjw6Jo5R1OW7S8J+10J903S0XtrExaH0 4I3ODhWok1F0I2NrpKg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-26_03,2026-03-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 impostorscore=0 malwarescore=0 bulkscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603260145 On 3/24/2026 3:48 PM, Konrad Dybcio wrote: > On 3/23/26 9:12 PM, Akhil P Oommen wrote: >> The programing sequence related to preemption is unchanged from A7x. But >> there is some code churn due to register shuffling in A8x. So, split out >> the common code into a header file for code sharing and add/update >> additional changes required to support preemption feature on A8x GPUs. >> >> Finally, enable the preemption quirk in A840's catalog to enable this >> feature. >> >> Signed-off-by: Akhil P Oommen >> --- > > [...] > >> + /* ... and after*/ > > ultra nit: space before comment end marker, please > > [...] > >> +static int a8xx_preempt_start(struct msm_gpu *gpu) >> +{ >> + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); >> + struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); >> + struct msm_ringbuffer *ring = gpu->rb[0]; >> + >> + if (gpu->nr_rings <= 1) > > Can this ever be < 1? This is just copy-paste from a7xx_preempt_start(). > > >> +static void a8xx_preempt_keepalive_vote(struct msm_gpu *gpu, bool on) >> +{ >> + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); >> + struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); >> + >> + if (adreno_has_gmu_wrapper(adreno_gpu)) >> + return; > > Are we going to have any a8xx+gmuwrapper? We can remove that check. -Akhil. > > Konrad