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This can stall forward progress and eventually degrade overall system performance. AMD hardware supports a feature Privilege Level Zero Association (PLZA), which allows the CPU's CLOSID and/or RMID association to be changed during the transition from user mode to kernel mode. This allows the kernel to run using a different CLOSID and/or RMID than user space, which can improve system performance and/or allow kernel work to be monitored separately. Note that PLZA feature associates CLOSID and/or RMID to kernel work, and therefore influences resource allocation and/or monitoring for all resources, not only memory bandwidth. The feature is detected via CPUID_Fn80000020_EBX_x00 [Bit 9]: Privilege Level Zero Association (PLZA). The PLZA feature details are documented in [1] available from [2]. [1] AMD64 Zen6 Platform Quality of Service (PQOS) Extensions: Publication # 69193 Revision: 1.00, Issue Date: March 2026 Signed-off-by: Babu Moger Acked-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 # [2] --- v7: Added Reviewed-by: tag(Reinette). v6: Highlight that CLOSID/RMID association affects all resources, not just memory bandwidth. v5: Added Acked-by from Boris. Updated the changelog to include cache allocation and monitoring. Moved the Link tag last. Updated subject line for cpufeatures. v4: Split the patch into 2. This patch only handles x86 changes. Re-wrote the changelog along the ABMC changes. v3: Code did not change. Patch order changed. Added documentation link. v2: Rebased on top of the latest tip. --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 303467a498b8..3090fb28ce06 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -536,6 +536,7 @@ * and purposes if CLEAR_CPU_BUF_VM is set). */ #define X86_FEATURE_X2AVIC_EXT (21*32+20) /* AMD SVM x2AVIC support for 4k vCPUs */ +#define X86_FEATURE_PLZA (21*32+21) /* Privilege Level Zero Association */ /* * BUG word(s) diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index c990245d29d6..be387ba1cbea 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -62,6 +62,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, { X86_FEATURE_ABMC, CPUID_EBX, 5, 0x80000020, 0 }, { X86_FEATURE_SDCIAE, CPUID_EBX, 6, 0x80000020, 0 }, + { X86_FEATURE_PLZA, CPUID_EBX, 9, 0x80000020, 0 }, { X86_FEATURE_AMD_WORKLOAD_CLASS, CPUID_EAX, 22, 0x80000021, 0 }, { X86_FEATURE_TSA_SQ_NO, CPUID_ECX, 1, 0x80000021, 0 }, { X86_FEATURE_TSA_L1_NO, CPUID_ECX, 2, 0x80000021, 0 }, -- 2.43.0