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([2606:6d00:17:7b4b::c41]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-88d997addd5sm136299236d6.33.2025.12.24.11.10.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Dec 2025 11:10:32 -0800 (PST) Message-ID: <92defeb3fdc1f1dac636671f44155e5b73246e79.camel@ndufresne.ca> Subject: Re: [PATCH 3/4] media: rkvdec: Add support for the VDPU346 variant From: Nicolas Dufresne To: Christian Hewitt , Detlev Casanova , Olivier =?ISO-8859-1?Q?Cr=EAte?= , Ezequiel Garcia , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Diederik de Haas , Dmitry Osipenko , Thomas Gleixner , Dragan Simic , Chukun Pan , linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Wed, 24 Dec 2025 14:10:30 -0500 In-Reply-To: <20251206082809.2040679-4-christianshewitt@gmail.com> References: <20251206082809.2040679-1-christianshewitt@gmail.com> <20251206082809.2040679-4-christianshewitt@gmail.com> Autocrypt: addr=nicolas@ndufresne.ca; prefer-encrypt=mutual; keydata=mDMEaCN2ixYJKwYBBAHaRw8BAQdAM0EHepTful3JOIzcPv6ekHOenE1u0vDG1gdHFrChD /e0J05pY29sYXMgRHVmcmVzbmUgPG5pY29sYXNAbmR1ZnJlc25lLmNhPoicBBMWCgBEAhsDBQsJCA cCAiICBhUKCQgLAgQWAgMBAh4HAheABQkJZfd1FiEE7w1SgRXEw8IaBG8S2UGUUSlgcvQFAmibrjo CGQEACgkQ2UGUUSlgcvQlQwD/RjpU1SZYcKG6pnfnQ8ivgtTkGDRUJ8gP3fK7+XUjRNIA/iXfhXMN abIWxO2oCXKf3TdD7aQ4070KO6zSxIcxgNQFtDFOaWNvbGFzIER1ZnJlc25lIDxuaWNvbGFzLmR1Z nJlc25lQGNvbGxhYm9yYS5jb20+iJkEExYKAEECGwMFCwkIBwICIgIGFQoJCAsCBBYCAwECHgcCF4 AWIQTvDVKBFcTDwhoEbxLZQZRRKWBy9AUCaCyyxgUJCWX3dQAKCRDZQZRRKWBy9ARJAP96pFmLffZ smBUpkyVBfFAf+zq6BJt769R0al3kHvUKdgD9G7KAHuioxD2v6SX7idpIazjzx8b8rfzwTWyOQWHC AAS0LU5pY29sYXMgRHVmcmVzbmUgPG5pY29sYXMuZHVmcmVzbmVAZ21haWwuY29tPoiZBBMWCgBBF iEE7w1SgRXEw8IaBG8S2UGUUSlgcvQFAmibrGYCGwMFCQll93UFCwkIBwICIgIGFQoJCAsCBBYCAw ECHgcCF4AACgkQ2UGUUSlgcvRObgD/YnQjfi4+L8f4fI7p1pPMTwRTcaRdy6aqkKEmKsCArzQBAK8 bRLv9QjuqsE6oQZra/RB4widZPvphs78H0P6NmpIJ Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-yuB6wf+lr8PoWSyb/nWH" User-Agent: Evolution 3.58.2 (3.58.2-1.fc43) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 --=-yuB6wf+lr8PoWSyb/nWH Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Le samedi 06 d=C3=A9cembre 2025 =C3=A0 08:28 +0000, Christian Hewitt a =C3= =A9crit=C2=A0: > VDPU346 is derived from VDPU381 but with a single core and limited > to 4K60 media. It is also limited to H264 L5.1 and omits AV1 and > AVS2 capabilities. It is used with RK3566 and RK3568. >=20 > Signed-off-by: Christian Hewitt Reviewed-by: Nicolas Dufresne Please resend whenever there is a dependency update, I believe some of the variant stuff is being modified. Another note, I tried bigger resolution, b= ut it only yielded green images, so the 65K max does not actually work and will n= eed investigation. Nicolas > --- > =C2=A0.../media/platform/rockchip/rkvdec/rkvdec.c=C2=A0=C2=A0 | 110 +++++= +++++++++++++ > =C2=A01 file changed, 110 insertions(+) >=20 > diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c > b/drivers/media/platform/rockchip/rkvdec/rkvdec.c > index a1c02ef3a97c..cf68454b2217 100644 > --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c > +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c > @@ -295,6 +295,62 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = =3D { > =C2=A0 .num_ctrls =3D ARRAY_SIZE(rkvdec_h264_ctrl_descs), > =C2=A0}; > =C2=A0 > +static const struct rkvdec_ctrl_desc vdpu346_hevc_ctrl_descs[] =3D { > + { > + .cfg.id =3D V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, > + }, > + { > + .cfg.id =3D V4L2_CID_STATELESS_HEVC_SPS, > + .cfg.ops =3D &rkvdec_ctrl_ops, > + }, > + { > + .cfg.id =3D V4L2_CID_STATELESS_HEVC_PPS, > + }, > + { > + .cfg.id =3D V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, > + }, > + { > + .cfg.id =3D V4L2_CID_STATELESS_HEVC_DECODE_MODE, > + .cfg.min =3D V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, > + .cfg.max =3D V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, > + .cfg.def =3D V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, > + }, > + { > + .cfg.id =3D V4L2_CID_STATELESS_HEVC_START_CODE, > + .cfg.min =3D V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, > + .cfg.def =3D V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, > + .cfg.max =3D V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, > + }, > + { > + .cfg.id =3D V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, > + .cfg.min =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, > + .cfg.max =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, > + .cfg.menu_skip_mask =3D > + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE), > + .cfg.def =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, > + }, > + { > + .cfg.id =3D V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, > + .cfg.min =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_1, > + .cfg.max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, > + }, > + { > + .cfg.id =3D V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS, > + .cfg.ops =3D &rkvdec_ctrl_ops, > + .cfg.dims =3D { 65 }, > + }, > + { > + .cfg.id =3D V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS, > + .cfg.ops =3D &rkvdec_ctrl_ops, > + .cfg.dims =3D { 65 }, > + }, > +}; > + > +static const struct rkvdec_ctrls vdpu346_hevc_ctrls =3D { > + .ctrls =3D vdpu346_hevc_ctrl_descs, > + .num_ctrls =3D ARRAY_SIZE(vdpu346_hevc_ctrl_descs), > +}; > + > =C2=A0static const struct rkvdec_ctrl_desc vdpu38x_hevc_ctrl_descs[] =3D = { > =C2=A0 { > =C2=A0 .cfg.id =3D V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, > @@ -449,6 +505,43 @@ static const struct rkvdec_coded_fmt_desc > rkvdec_coded_fmts[] =3D { > =C2=A0 } > =C2=A0}; > =C2=A0 > +static const struct rkvdec_coded_fmt_desc vdpu346_coded_fmts[] =3D { > + { > + .fourcc =3D V4L2_PIX_FMT_H264_SLICE, > + .frmsize =3D { > + .min_width =3D 64, > + .max_width =3D=C2=A0 65520, > + .step_width =3D 64, > + .min_height =3D 64, > + .max_height =3D=C2=A0 65520, > + .step_height =3D 16, > + }, > + .ctrls =3D &rkvdec_h264_ctrls, > + .ops =3D &rkvdec_vdpu381_h264_fmt_ops, > + .num_decoded_fmts =3D ARRAY_SIZE(rkvdec_h264_decoded_fmts), > + .decoded_fmts =3D rkvdec_h264_decoded_fmts, > + .subsystem_flags =3D VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, > + .capability =3D RKVDEC_CAPABILITY_H264, > + }, > + { > + .fourcc =3D V4L2_PIX_FMT_HEVC_SLICE, > + .frmsize =3D { > + .min_width =3D 64, > + .max_width =3D 65472, > + .step_width =3D 64, > + .min_height =3D 64, > + .max_height =3D 65472, > + .step_height =3D 16, > + }, > + .ctrls =3D &vdpu346_hevc_ctrls, > + .ops =3D &rkvdec_vdpu381_hevc_fmt_ops, > + .num_decoded_fmts =3D ARRAY_SIZE(rkvdec_hevc_decoded_fmts), > + .decoded_fmts =3D rkvdec_hevc_decoded_fmts, > + .subsystem_flags =3D VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, > + .capability =3D RKVDEC_CAPABILITY_HEVC, > + }, > +}; > + > =C2=A0static const struct rkvdec_coded_fmt_desc vdpu381_coded_fmts[] =3D = { > =C2=A0 { > =C2=A0 .fourcc =3D V4L2_PIX_FMT_H264_SLICE, > @@ -1654,6 +1747,19 @@ static const struct rkvdec_variant > rk3399_rkvdec_variant =3D { > =C2=A0 RKVDEC_CAPABILITY_VP9, > =C2=A0}; > =C2=A0 > +static const struct rkvdec_variant rk3568_vdpu346_variant =3D { > + .coded_fmts =3D vdpu346_coded_fmts, > + .num_coded_fmts =3D ARRAY_SIZE(vdpu346_coded_fmts), > + .rcb_sizes =3D vdpu381_rcb_sizes, > + .num_rcb_sizes =3D ARRAY_SIZE(vdpu381_rcb_sizes), > + .irq_handler =3D vdpu381_irq_handler, > + .colmv_size =3D rkvdec_colmv_size, > + .flatten_matrices =3D transpose_and_flatten_matrices, > + .named_regs =3D true, > + .capabilities =3D RKVDEC_CAPABILITY_H264 | > + RKVDEC_CAPABILITY_HEVC, > +}; > + > =C2=A0static const struct rkvdec_variant rk3588_vdpu381_variant =3D { > =C2=A0 .coded_fmts =3D vdpu381_coded_fmts, > =C2=A0 .num_coded_fmts =3D ARRAY_SIZE(vdpu381_coded_fmts), > @@ -1693,6 +1799,10 @@ static const struct of_device_id of_rkvdec_match[]= =3D { > =C2=A0 .compatible =3D "rockchip,rk3399-vdec", > =C2=A0 .data =3D &rk3399_rkvdec_variant, > =C2=A0 }, > + { > + .compatible =3D "rockchip,rk3568-vdec", > + .data =3D &rk3568_vdpu346_variant, > + }, > =C2=A0 { > =C2=A0 .compatible =3D "rockchip,rk3588-vdec", > =C2=A0 .data =3D &rk3588_vdpu381_variant, --=-yuB6wf+lr8PoWSyb/nWH Content-Type: application/pgp-signature; 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