From: Shivansh Dhiman <shivansh.dhiman@amd.com>
To: Jim Mattson <jmattson@google.com>
Cc: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>, <nikunj.dadhania@amd.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>, <x86@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Maxim Levitsky <mlevitsk@redhat.com>, <kvm@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Matteo Rizzo <matteorizzo@google.com>, <evn@google.com>
Subject: Re: [PATCH] KVM: x86: SVM: Mark VMCB_LBR dirty when L1 sets DebugCtl[LBR]
Date: Fri, 7 Nov 2025 12:32:01 +0530 [thread overview]
Message-ID: <93211ebf-1b8b-4543-bd1c-f3805a54833e@amd.com> (raw)
In-Reply-To: <CALMp9eQJ69euqBs2NF6fQtb-Vf_0XqSiXs07h29Gr57-cvdGJg@mail.gmail.com>
On 06-11-2025 23:30, Jim Mattson wrote:
> On Thu, Nov 6, 2025 at 8:09 AM Shivansh Dhiman <shivansh.dhiman@amd.com> wrote:
>>
>> On 01-11-2025 05:32, Jim Mattson wrote:
>>> With the VMCB's LBR_VIRTUALIZATION_ENABLE bit set, the CPU will load
>>> the DebugCtl MSR from the VMCB's DBGCTL field at VMRUN. To ensure that
>>> it does not load a stale cached value, clear the VMCB's LBR clean bit
>>> when L1 is running and bit 0 (LBR) of the DBGCTL field is changed from
>>> 0 to 1. (Note that this is already handled correctly when L2 is
>>> running.)
>>>
>> Hi Jim,
>> I am thinking, is it possible to add a test in KVM Unit Tests that
>> covers this? Something where the stale cached value is loaded instead of
>> the correct one, without your patch.
>
> Though permitted by the architectural specification, I don't know if
> there is any hardware that caches the DBGCTL field when LBR
> virtualization is disabled.
Alrighty.
Tested-by: Shivansh Dhiman <shivansh.dhiman@amd.com>
-Shivansh
next prev parent reply other threads:[~2025-11-07 7:02 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-01 0:02 Jim Mattson
2025-11-03 17:42 ` Yosry Ahmed
2025-11-03 18:10 ` Jim Mattson
2025-11-06 16:08 ` Shivansh Dhiman
2025-11-06 18:00 ` Jim Mattson
2025-11-07 7:02 ` Shivansh Dhiman [this message]
2025-11-07 19:08 ` Jim Mattson
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