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From: Andrew Lunn <andrew@lunn.ch>
To: yicongsrfy@163.com
Cc: linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
	hkallweit1@gmail.com, kuba@kernel.org,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
	pabeni@redhat.com, yicong@kylinos.cn
Subject: Re: [PATCH] net: phy: avoid config_init failure on unattached PHY during resume
Date: Thu, 11 Sep 2025 14:58:32 +0200	[thread overview]
Message-ID: <9393c232-06d8-464e-ac94-597eaeda2630@lunn.ch> (raw)
In-Reply-To: <20250911112525.3824360-1-yicongsrfy@163.com>

> Some PHY chips support two addresses, using address 0 as a broadcast address
> and address 1 as the hardware address. Both addresses respond to GMAC's MDIO
> read/write operations. As a result, during 'mdio_scan', both PHY addresses are
> detected, leading to the creation of two PHY device instances (for example,
> as in my previous email: xxxxmac_mii_bus-XXXX:00:00 and xxxxmac_mii_bus-XXXX:00:01).

I would say the PHY driver is broken, or at least, not correctly
handling the situation. When the scan finds the PHY at address 0, the
PHY driver is probed, and it should look at the strapping and decided,
if the strapping has put the PHY at address 0, or its the broadcast
address being used. If it is the broadcast address, turn off broadcast
address, and return -ENODEV. phylib should then not create a PHY at
address 0. The scan will continue and find the PHY at its correct
address. Your problem then goes away, and phylib has a correct
representation of the hardware.

The harder bit is backwards compatibility. Are there DT files which
make use of the broadcast address, and disabling it will break them?

We have seen patches disabling broadcast, but i don't remember for
which PHY.

	Andrew

  reply	other threads:[~2025-09-11 12:58 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-10  2:58 yicongsrfy
2025-09-10  8:15 ` Russell King (Oracle)
2025-09-10  9:17   ` yicongsrfy
2025-09-10  9:31     ` yicongsrfy
2025-09-10  9:57       ` Russell King (Oracle)
2025-09-10  9:54     ` Russell King (Oracle)
2025-09-11 11:25       ` yicongsrfy
2025-09-11 12:58         ` Andrew Lunn [this message]
2025-09-17  8:24           ` yicongsrfy
2025-09-17 10:06         ` Russell King (Oracle)
2025-09-19  7:38           ` yicongsrfy
2025-09-19 12:45             ` Andrew Lunn
2025-09-22  1:56               ` yicongsrfy

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