From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: Jakub Czapiga <czapiga@google.com>
Cc: Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <mwalle@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] mtd: spi-nor: winbond: fix W25Q256 and W25Q512 chips configuration
Date: Tue, 18 Mar 2025 08:29:58 +0200 [thread overview]
Message-ID: <93f5e13d-2a4d-4528-9c55-37a79eae3da3@linaro.org> (raw)
In-Reply-To: <20250317182103.2060524-1-czapiga@google.com>
On 17.03.2025 20:21, Jakub Czapiga wrote:
> Fill and fix configuration of Winbond chips:
> - W25Q512JVQ (+lock, +tb)
> - W25Q256JW (+lock, +tb)
> - W25Q256JVM (+lock, +tb, +4k, +dual, +quad)
> - W25Q512JWM (+lock, +tb)
>
> Top-Bottom selection bit is SR(6). All mentioned chips have 4-bit long
> Block-Protection field.
>
> Signed-off-by: Jakub Czapiga <czapiga@google.com>
> ---
> drivers/mtd/spi-nor/winbond.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
> index 8d0a00d69e12..8ebb1461a4e9 100644
> --- a/drivers/mtd/spi-nor/winbond.c
> +++ b/drivers/mtd/spi-nor/winbond.c
> @@ -145,6 +145,7 @@ static const struct flash_info winbond_nor_parts[] = {
> .id = SNOR_ID(0xef, 0x40, 0x20),
> .name = "w25q512jvq",
drop the name on next version and add it as a comment
> .size = SZ_64M,
drop size if flash supports SFDP
> + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
drop no_sfdp_flags if flash supports SFDP.
Btw, switching to SFDP shall be done in a dedicated patch, then come
with the BP patch on top of it. Comment applies to all patches.
> }, {
> .id = SNOR_ID(0xef, 0x50, 0x12),
> @@ -190,6 +191,7 @@ static const struct flash_info winbond_nor_parts[] = {
> .id = SNOR_ID(0xef, 0x60, 0x19),
> .name = "w25q256jw",
> .size = SZ_32M,
> + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
same comments as above for this flash and all from below.
Cheers,
ta
> }, {
> .id = SNOR_ID(0xef, 0x60, 0x20),
> @@ -221,6 +223,9 @@ static const struct flash_info winbond_nor_parts[] = {
> }, {
> .id = SNOR_ID(0xef, 0x70, 0x19),
> .name = "w25q256jvm",
> + .size = SZ_32M,
> + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
> + .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> }, {
> .id = SNOR_ID(0xef, 0x71, 0x19),
> .name = "w25m512jv",
> @@ -249,7 +254,7 @@ static const struct flash_info winbond_nor_parts[] = {
> .id = SNOR_ID(0xef, 0x80, 0x19),
> .name = "w25q256jwm",
> .size = SZ_32M,
> - .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
> + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> }, {
> .id = SNOR_ID(0xef, 0x80, 0x20),
prev parent reply other threads:[~2025-03-18 6:30 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-17 18:21 Jakub Czapiga
2025-03-18 6:29 ` Tudor Ambarus [this message]
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