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Mon, 09 Feb 2026 09:23:43 -0800 (PST) X-Received: by 2002:a05:7301:4e09:b0:2b7:c285:837d with SMTP id 5a478bee46e88-2ba884a9c27mr78902eec.4.1770657822553; Mon, 09 Feb 2026 09:23:42 -0800 (PST) Received: from [192.168.1.133] ([70.95.199.79]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2ba71a0af3dsm2488984eec.0.2026.02.09.09.23.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Feb 2026 09:23:42 -0800 (PST) Message-ID: <94000dfc-3672-4453-9b56-420404a79fec@oss.qualcomm.com> Date: Mon, 9 Feb 2026 09:23:40 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/9] usb: misc: qcom_eud: add per-path High-Speed PHY control To: Konrad Dybcio , Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> <20260126233830.2193816-4-elson.serrao@oss.qualcomm.com> <9f81c07a-c1c6-4888-975d-528a6181caea@oss.qualcomm.com> Content-Language: en-US From: Elson Serrao In-Reply-To: <9f81c07a-c1c6-4888-975d-528a6181caea@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: eZgeAUsicUqTdmfgxlcJMGSi8092IwOC X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjA5MDE0NiBTYWx0ZWRfXyVN7NNdE0yoV vxQ9nHGUx/H9l6GxLDGxRUNuC0btr3vahne9bauECLi+uAjPLt6A0VWmn1ujSz4Dm725EoAzcEC w/xyzSlI+AaGOChDCElvnNnYWK5D+AXDUAS2uBXFBmordBJk3stTk+NJrU4LC3s8yUJlJtoxt2C vPciL0SGF+B1iWCCZnqqQJcBXZTjvqo6f/L31j6t4Y5qT8ZSzg7VylRoA3ByuGrvBQSQl3anEPb kO+9BXq4HOrU1oUF3xpTEbBL6tmeHUwyLJ2Gp33LzPAchdv+e6teCSG5TgKmN0OVs2S75th4rgK cLa1Q/R3YSuQx1lJbRuSGyjziTP0Js0zYEJCsL7d3LYT360aP6Poe6qF8U6SLxylRDBvnQtA1Kh WvAsnHpGySCVX5WfBhindsOmmnlfYXxHQ+8fVkMMs3PWKhcWyfeDnm5G1x1sHEk3RGc9SJDWfjk m+3I47rlG/Jw81LeGUA== X-Authority-Analysis: v=2.4 cv=F6Rat6hN c=1 sm=1 tr=0 ts=698a1821 cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=uHxescsG3rBdxcXwcPaeSg==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=i2ahz-mu8vMz2UVK6u0A:9 a=QEXdDO2ut3YA:10 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-GUID: eZgeAUsicUqTdmfgxlcJMGSi8092IwOC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-09_01,2026-02-09_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 phishscore=0 suspectscore=0 malwarescore=0 bulkscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602090146 On 2/4/2026 5:21 AM, Konrad Dybcio wrote: > On 1/27/26 12:38 AM, Elson Serrao wrote: >> EUD hardware can support multiple High-Speed USB paths, each routed >> through its own PHY. The active path is selected in hardware via the >> EUD_PORT_SEL register. As a High-Speed hub, EUD requires access to the >> High-Speed PHY associated with the active UTMI path. To support this >> multi-path capability, the driver must manage PHY resources on a per-path >> basis, ensuring that the PHY for the currently selected path is properly >> initialized and powered. >> >> This patch restructures the driver to implement per-path PHY management. >> The driver now powers the appropriate PHY based on the selected and >> enabled UTMI path, ensuring correct operation when EUD is enabled. >> >> Supporting this requires describing the available UTMI paths and their >> corresponding PHYs in Device Tree. This updates DT requirements and is >> not backward compatible with older DTs that lacked this description. >> Historically, EUD appeared to work on single-path systems because the >> USB controller kept the PHY initialized. However, EUD is designed to >> operate independently of the USB controller and therefore requires >> explicit PHY control. >> >> Signed-off-by: Elson Serrao >> --- > > [...] > >> +static int eud_phy_enable(struct eud_chip *chip) >> +{ >> + struct eud_path *path; >> + struct phy *phy; >> + int ret; >> + >> + if (chip->phy_enabled) >> + return 0; >> + >> + path = chip->paths[chip->port_idx]; >> + if (!path || !path->phy) { > > I think neither are possible - path is != NULL since we can't enter into > this function without failing the check in _store and !path->phy would error > out in probe()->eud_init_path() > > [...] > >> +static void eud_phy_disable(struct eud_chip *chip) >> +{ >> + struct eud_path *path; >> + struct phy *phy; >> + >> + if (!chip->phy_enabled) >> + return; >> + >> + path = chip->paths[chip->port_idx]; >> + if (!path || !path->phy) > > Likewise > > [...] > >> +static int eud_init_path(struct eud_chip *chip, struct device_node *np) >> +{ >> + struct eud_path *path; >> + u32 path_num; >> + int ret; >> + >> + ret = of_property_read_u32(np, "reg", &path_num); >> + if (ret) { >> + dev_err(chip->dev, "Missing 'reg' property in path node\n"); >> + return ret; > > You can use return dev_err_probe like you did a little below > >> + } >> + >> + if (path_num >= EUD_MAX_PORTS) { >> + dev_err(chip->dev, "Invalid path number: %u (max %d)\n", >> + path_num, EUD_MAX_PORTS - 1); >> + return -EINVAL; >> + } >> + >> + path = devm_kzalloc(chip->dev, sizeof(*path), GFP_KERNEL); >> + if (!path) >> + return -ENOMEM; >> + >> + path->chip = chip; >> + path->num = path_num; >> + >> + path->phy = devm_of_phy_get(chip->dev, np, NULL); >> + if (IS_ERR(path->phy)) >> + return dev_err_probe(chip->dev, PTR_ERR(path->phy), >> + "Failed to get PHY for path %d\n", path_num); >> + >> + chip->paths[path_num] = path; >> + >> + return 0; >> +} >> + >> static int eud_probe(struct platform_device *pdev) >> { >> + struct device_node *np = pdev->dev.of_node; >> + struct device_node *child; >> struct eud_chip *chip; >> struct resource *res; >> int ret; >> @@ -252,6 +368,18 @@ static int eud_probe(struct platform_device *pdev) >> if (ret) >> return ret; >> >> + for_each_child_of_node(np, child) { > > With for_each_child_of_node_scoped(), you can dispose of the manual > _put() > >> + ret = eud_init_path(chip, child); >> + if (ret) { >> + of_node_put(child); >> + return ret; >> + } >> + } >> + >> + /* Primary path is mandatory. Secondary is optional */ >> + if (!chip->paths[0]) >> + return -ENODEV; > > I'm going to assume we don't have any funny chips that violate this :) > On all current SoCs, EUD_PORT_SEL defaults to 0, and the hardware guide defines this as mapping to USB port 0. So the primary path being mandatory is a valid assumption for existing hardware. Thanks, Elson