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dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from CY0PR12MB226969.namprd12.prod.outlook.com (2603:10b6:930:130::18) by BY5PR12MB4052.namprd12.prod.outlook.com (2603:10b6:a03:209::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.569.10; Sat, 31 Oct 2026 01:44:34 +0000 Received: from CY0PR12MB226969.namprd12.prod.outlook.com ([fe80::f47a:5d4e:f3d5:5b26]) by CY0PR12MB226969.namprd12.prod.outlook.com ([fe80::f47a:5d4e:f3d5:5b26%4]) with mapi id 15.21.0569.009; Sat, 31 Oct 2026 01:44:34 +0000 Message-ID: <94b0ea91-3fe6-4458-b0c1-14d487a11352@amd.com> Date: Fri, 30 Oct 2026 19:44:31 -0600 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drm/amd/display: Fix NULL deref in dcn401_update_clocks_update_dtb_dto To: Roman Demidov , Harry Wentland Cc: Leo Li , Rodrigo Siqueira , Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Dillon Varone , Gaghik Khachatrian , James Lin , Austin Zheng , Bhuvanachandra Pinninti , Kees Cook , Wenjing Liu , Alvin Lee , Fangzhi Zuo , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, lvc-project@linuxtesting.org References: <20261019072938.10074-1-roman.demidov.nn@gmail.com> Content-Language: en-US From: Alex Hung In-Reply-To: <20261019072938.10074-1-roman.demidov.nn@gmail.com> Content-Type: text/plain; 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The current code dereferences this pointer > without a NULL check. This may lead to a possible NULL pointer > dereference. > > [How] > Add an explicit NULL check and skip the stream if the OTG master is not > found. This is similar to dcn60_update_clocks_update_dtb_dto(). > > Found by Linux Verification Center (linuxtesting.org) with SVACE. > > Fixes: b6d508533fa1 ("drm/amd/display: fix a crash when clock source is reference for non otg master pipe") > Signed-off-by: Roman Demidov > --- > drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c > index 6ee3da89d058..135eeef68ac4 100644 > --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c > +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c > @@ -538,6 +538,9 @@ static void dcn401_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr > otg_master = resource_get_otg_master_for_stream( > &context->res_ctx, context->streams[i]); > ASSERT(otg_master); > + if (!otg_master) > + continue; > + > ASSERT(otg_master->clock_source); > ASSERT(otg_master->clock_source->funcs->program_pix_clk); > ASSERT(otg_master->stream_res.pix_clk_params.controller_id >= CONTROLLER_ID_D0);