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Message-ID: <94bd10f5-fb4a-e14b-2e75-f16689f42224@somainline.org>
Date:   Mon, 31 Oct 2022 22:18:16 +0100
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Subject: Re: [PATCH v5 7/8] arm64: dts: qcom: sm4250: Add soc dtsi
Content-Language: en-US
To:     Iskren Chernev <iskren.chernev@gmail.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Rob Herring <robh+dt@kernel.org>
Cc:     phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        Andy Gross <agross@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        linux-kernel@vger.kernel.org
References: <20221030094258.486428-1-iskren.chernev@gmail.com>
 <20221030094258.486428-8-iskren.chernev@gmail.com>
From:   Konrad Dybcio <konrad.dybcio@somainline.org>
In-Reply-To: <20221030094258.486428-8-iskren.chernev@gmail.com>
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On 30.10.2022 10:42, Iskren Chernev wrote:
> The SM4250 is a downclocked version of the SM6115.
> 
> Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  arch/arm64/boot/dts/qcom/sm4250.dtsi | 38 ++++++++++++++++++++++++++++
>  1 file changed, 38 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sm4250.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi
> new file mode 100644
> index 000000000000..c5add8f44fc0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi
> @@ -0,0 +1,38 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (c) 2021, Iskren Chernev <iskren.chernev@gmail.com>
> + */
> +
> +#include "sm6115.dtsi"
> +
> +&CPU0 {
> +	compatible = "qcom,kryo240";
> +};
> +
> +&CPU1 {
> +	compatible = "qcom,kryo240";
> +};
> +
> +&CPU2 {
> +	compatible = "qcom,kryo240";
> +};
> +
> +&CPU3 {
> +	compatible = "qcom,kryo240";
> +};
> +
> +&CPU4 {
> +	compatible = "qcom,kryo240";
> +};
> +
> +&CPU5 {
> +	compatible = "qcom,kryo240";
> +};
> +
> +&CPU6 {
> +	compatible = "qcom,kryo240";
> +};
> +
> +&CPU7 {
> +	compatible = "qcom,kryo240";
> +};