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Wed, 25 Jun 2025 00:37:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mleia.com; s=mail; t=1750811870; bh=uAdDQOZBr2xxgHWEJYA1qKLjMi1UEW7xBPT8xSxiCLo=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=FNQwi2Mw3fcOJsFaMm6tl2xSstff+1H9QgLAn5FoEqRG96wCy4iELWkbXjzJwGn3E LRVCdmVOI3BebMrxRMTaofBOf6Jff5IkPdyKsVH5T8WBoHZkBWUvo0atJ+w5mQMwbC 0Slg4d0rfDOEcnOKJdJhc/9hmUrCjZSrXLQjJ3j86LK/LkM6SUpTw9WY8L/nkpPpZS Fu4gudcYi8gUnoXvdIrc+FPge1zMXOrnxasWrPP6CawAo0/Hi5LbVZDLcxUsHsmPZq QGhhvfyFo3J09H253PB+06UlC2ZBHvtBRYTK3+ejCRKnsLOXdqF8a+hT1ZGI3CEz1X UIABdMs8K8IDw== Message-ID: <94e42d9b-fae3-4e3a-a72f-dc284d0b4abc@mleia.com> Date: Wed, 25 Jun 2025 03:37:49 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] dt-bindings: pwm: convert lpc32xx-pwm.txt to yaml format To: Frank Li , =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Piotr Wojtaszczyk , "open list:PWM SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/LPC32XX SOC SUPPORT" , open list Cc: imx@lists.linux.dev References: <20250624200955.2514896-1-Frank.Li@nxp.com> From: Vladimir Zapolskiy In-Reply-To: <20250624200955.2514896-1-Frank.Li@nxp.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20250625_003750_821844_CBF1CDBA X-CRM114-Status: GOOD ( 16.68 ) On 6/24/25 23:09, Frank Li wrote: > Convert pc32xx-pwm.txt to yaml format. > > Additional changes: > - add ref to pwm.yaml > - restrict #pwm-cells to 3 > > Signed-off-by: Frank Li > --- > .../devicetree/bindings/pwm/lpc32xx-pwm.txt | 17 -------- > .../bindings/pwm/nxp,lpc3220-pwm.yaml | 41 +++++++++++++++++++ > 2 files changed, 41 insertions(+), 17 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt > create mode 100644 Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml > > diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt > deleted file mode 100644 > index 74b5bc5dd19ac..0000000000000 > --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt > +++ /dev/null > @@ -1,17 +0,0 @@ > -LPC32XX PWM controller > - > -Required properties: > -- compatible: should be "nxp,lpc3220-pwm" > -- reg: physical base address and length of the controller's registers > - > -Examples: > - > -pwm@4005c000 { > - compatible = "nxp,lpc3220-pwm"; > - reg = <0x4005c000 0x4>; > -}; > - > -pwm@4005c004 { > - compatible = "nxp,lpc3220-pwm"; > - reg = <0x4005c004 0x4>; > -}; > diff --git a/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml b/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml > new file mode 100644 > index 0000000000000..b82d52f583df8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml > @@ -0,0 +1,41 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/nxp,lpc3220-pwm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP LPC32XX PWM controller > + > +maintainers: > + - Frank Li > + > +properties: > + compatible: > + enum: > + - nxp,lpc3220-pwm > + - nxp,lpc3220-motor-pwm > + > + reg: > + maxItems: 1 > + > + '#pwm-cells': > + const: 3 > + > +required: > + - compatible > + - reg > + - '#pwm-cells' > + > +allOf: > + - $ref: pwm.yaml# > + > +unevaluatedProperties: false > + > +examples: > + - | > + pwm@4005c000 { > + compatible = "nxp,lpc3220-pwm"; > + reg = <0x4005c000 0x4>; > + #pwm-cells = <3>; > + }; > + "clocks" and "assigned-clock-parents" properties are required. Please fix the old .txt scheme, or the new one. I will have to NAK any converted yaml file, if there is a clear difference between the actual and proper description of controllers from lpc32xx.dtsi and new proposed schemes. -- Best wishes, Vladimir