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Wed, 21 Oct 2026 08:16:37 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-ThreadId: Anl2GdpqQwQR Date: Wed, 21 Oct 2026 14:15:56 +0200 From: "Arnd Bergmann" To: "Gary Guo" , "Philipp Stanner" , "Sumit Semwal" , =?UTF-8?Q?Christian_K=C3=B6nig?= , "Yury Norov" , "Rasmus Villemoes" , "Tvrtko Ursulin" , "Danilo Krummrich" , "Paul E. McKenney" Cc: linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Linux-Arch Message-Id: <9505cbc2-7261-4f84-9769-b97e9acb1c38@app.fastmail.com> In-Reply-To: References: <20261021095512.1345191-2-phasta@kernel.org> <20261021095512.1345191-3-phasta@kernel.org> <9f4bbc9a-fc36-4e3a-9c42-d18419c9d025@app.fastmail.com> Subject: Re: [PATCH 1/2] asm-generic/bitops: Add set_bit_release() Content-Type: text/plain Content-Transfer-Encoding: 7bit On Wed, Oct 21, 2026, at 13:54, Gary Guo wrote: > On Wed Oct 21, 2026 at 12:33 PM BST, Arnd Bergmann wrote: >> I'm always confused by this and the new function makes it harder >> to understand in the current form: ... >> - Contrary to that, the kerneldoc comment over set_bit() mentions >> "This is a relaxed atomic operation (no implied memory barriers)" >> and leaves out the kcsan_mb() that is in test_and_set_bit(). >> This makes the new set_bit_release() sound like a /stronger/ >> version of set_bit() the same way that test_bit_acquire() >> is a stronger version of the (relaxed) test_bit(). > > set_bit has relaxed semantics while test_and_set_bit implies barrier. RISC-V for > exmaple will generate the amoor instruction for set_bit, not amoor.aqrl. Thanks for the clarification, I did misread the implementation and see how I was confused once more. Arnd